Pwm 1 Period Register; Pwm 1 Counter Register; Table 15-3 Pwm 1 Period Register Description; Table 15-4 Pwm 1 Counter Register Description - Motorola MC68VZ328 User Manual

15.4.3

PWM 1 Period Register

This register controls the pulse-width modulator period. When the counter value matches PERIOD + 1, the
counter is reset to start another period. Therefore, the following equation applies:
Writing 0xFF to this register achieves the same result as writing 0xFE.
The register bit assignments are shown in the following register display. The register settings are described
in Table 15-3.
PWMP1
BIT 7
TYPE
RESET
Name
PERIOD Period—This field represents the pulse-width modulator's period control value.
Bits 7–0
15.4.4

PWM 1 Counter Register

This register contains the current count value and can be read at any time without disturbing the counter.
The register bit assignments are shown in the following register display. The register settings are described
in Table 15-4.
PWMCNT1
BIT 7
TYPE r
0
RESET
Name
COUNT Count—This field represents the value of the current count.
Bits 7–0
PWMO (Hz) = PCLK (Hz) / (PERIOD + 2)
PWM 1 Period Register
6 5
rw rw rw
1 1 1
Table 15-3. PWM 1 Period Register Description
Description
PWM 1 Counter Register
6 5
r r
0 0
Table 15-4. PWM 1 Counter Register Description
Description
Pulse-Width Modulator 1 and 2
4 3 2
PERIOD
rw rw rw
1 1 1
0xFE
4 3 2
COUNT
r r r
0 0 0
0x00
Programming Model
Eqn. 15-1
0x(FF)FFF504
1 BIT 0
rw rw
1 0
Setting
None
0x(FF)FFF505
1 BIT 0
r r
0 0
Setting
None
15-7