Table of Contents
Advertisement
www.ti.com
M-BootROM
RAM_INIT All the RAMs
Clear POR bit in
held in reset
B.C28X-WIR mode check
EMU0==0;
EMU1==1
Yes
SPRUH22I – April 2012 – Revised November 2019
Submit Documentation Feedback
Figure 6-12. C-Boot ROM Flow Chart
POR/BOR/
XRSn
Control system
held in reset
POR/BOR/XRSn
Yes
Reset Cause == POR
C28X-CSM sequence
NO
Install PIE Vector mismatch
No
handler at @0x3FFFBE
Install MTOCIPCINT1
Copyright © 2012–2019, Texas Instruments Incorporated
Reset
because of
OR from M3
C28X
HWBIST
reset
C28X Reset
Enble NMI
BIST RESET
Reset Cause
Enable PIE
Go to IDLE mode;
Wake up to handle
IPC interrupts
C-Boot ROM Description
C28X
C28X
Debugger
NMI_WD
reset
reset
No
zero-initialize C-Boot
ROM reserved stack
Call C28X
HWBIST handler
ROM Code and Peripheral Booting
583
Advertisement
Chapters
Table of Contents
