ST STM32G4 Series Reference Manual page 441

RM0440
16.4 CORDIC registers
Note: The CORDIC registers may only be accessed in 32-bit word format
16.4.1 CORDIC control/status register (CORDIC_CSR)
Address offset: 0x00
Reset value: 0x0000 0050
31 30 29
RRDY Res. Res. Res.
r
15 14 13
Res. Res. Res. Res.
Bits 30:23 Reserved, must be kept at reset value.
28 27 26 25
Res. Res. Res.
12 11 10 9
Res. SCALE
rw
Bit 31 RRDY: Result ready flag.
0: No new result in output register
1: CORDIC_RDATA register contains new data
This bit is set by hardware when a CORDIC operation completes. It is reset by
hardware when the CORDIC_RDATA register is read (NRES+1) times.
When this bit is set, if the IEN bit is also set, the CORDIC interrupt is asserted. If
the DMAREN bit is set, a DMA read channel request is generated. While this bit
is set, no new calculation will be started.
Bit 22 ARGSIZE: Width of input data
0: 32-bit
1: 16-bit
ARGSIZE selects the number of bits used to represent input data.
If 32-bit data is selected, the CORDIC_WDATA register expects arguments in
q1.31 format.
If 16-bit data is selected, the CORDIC_WDATA register expects arguments in
q1.15 format. The primary argument (ARG1) is written to the least significant
half-word, and the secondary argument (ARG2) to the most significant half-word.
Bit 21 RESSIZE: Width of output data
0: 32-bit
1: 16-bit
RESSIZE selects the number of bits used to represent output data.
If 32-bit data is selected, the CORDIC_RDATA register contains results in q1.31
format.
If 16-bit data is selected, the least significant half-word of CORDIC_RDATA con-
tains the primary result (RES1) in q1.15 format, and the most significant half-
word contains the secondary result (RES2), also in q1.15 format.
Bit 20 NARGS: Number of arguments expected by the CORDIC_WDATA register.
0: Only one 32-bit write (or two 16-bit values if ARGSIZE = 1) is needed for the
next calculation.
1: Two 32-bit values must be written to the CORDIC_WDATA register to trigger
the next calculation.
Reads return the current state of the bit.
24 23 22
ARG RES
Res. Res.
SIZE SIZE
rw
8 7 6
PRECISION
rw
RM0440 Rev 1
CORDIC co-processor (CORDIC)
21 20 19 18
NARG DMA
NRES
S WEN
rw rw rw rw
5 4 3 2
17 16
DMA
IEN
REN
rw rw
1 0
FUNC
rw
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