Dac Registers - ST STM32L4x6 Reference Manual

RM0351
17.5

DAC registers

Refer to
The peripheral registers have to be accessed by words (32-bit).
17.5.1 DAC control register (DAC_CR)
Address offset: 0x00
Reset value: 0x0000 0000
31 30 29 28
DMAU DMA
Res.
CEN2
DRIE2 EN2
rw rw rw
15 14 13 12
DMAU DMA
Res.
CEN1
DRIE1 EN1
rw rw rw
Bit 31 Reserved, must be kept at reset value
Bit 30 CEN2: DAC Channel 2 calibration enable
This bit is set and cleared by software to enable/disable DAC channel 2 calibration, it can be
written only if bit EN2=0 into DAC_CR (the calibration mode can be entered/exit only when
the DAC channel is disabled) Otherwise, the write operation is ignored.
0: DAC channel 2 in normal operating mode
1: DAC channel 2 in calibration mode
Bit 29 DMAUDRIE2: DAC channel2 DMA underrun interrupt enable
This bit is set and cleared by software.
0: DAC channel2 DMA underrun interrupt disabled
1: DAC channel2 DMA underrun interrupt enabled
Bit 28 DMAEN2: DAC channel2 DMA enable
This bit is set and cleared by software.
0: DAC channel2 DMA mode disabled
1: DAC channel2 DMA mode enabled
Bits 27:24 MAMP2[3:0]: DAC channel2 mask/amplitude selector
These bits are written by software to select mask in wave generation mode or amplitude in
triangle generation mode.
0000: Unmask bit0 of LFSR/ triangle amplitude equal to 1
0001: Unmask bits[1:0] of LFSR/ triangle amplitude equal to 3
0010: Unmask bits[2:0] of LFSR/ triangle amplitude equal to 7
0011: Unmask bits[3:0] of LFSR/ triangle amplitude equal to 15
0100: Unmask bits[4:0] of LFSR/ triangle amplitude equal to 31
0101: Unmask bits[5:0] of LFSR/ triangle amplitude equal to 63
0110: Unmask bits[6:0] of LFSR/ triangle amplitude equal to 127
0111: Unmask bits[7:0] of LFSR/ triangle amplitude equal to 255
1000: Unmask bits[8:0] of LFSR/ triangle amplitude equal to 511
1001: Unmask bits[9:0] of LFSR/ triangle amplitude equal to 1023
1010: Unmask bits[10:0] of LFSR/ triangle amplitude equal to 2047
≥ 1011: Unmask bits[11:0] of LFSR/ triangle amplitude equal to 4095
Section 1 on page 61
27 26 25
MAMP2[3:0]
rw rw rw
11 10 9
MAMP1[3:0]
rw rw rw
for a list of abbreviations used in register descriptions.
24 23 22
WAVE2[1:0]
rw rw rw
8 7 6
WAVE1[1:0]
rw rw rw
DocID024597 Rev 3
Digital-to-analog converter (DAC)
21 20 19 18
TSEL2[2:0] TEN2
rw rw rw rw
5 4 3 2
TSEL1[2:0] TEN1
rw rw rw rw
17 16
Res. EN2
rw
1 0
Res. EN1
rw
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