Quadspi Status Register (Quadspi_Sr) - ST STM32L4x6 Reference Manual

RM0351
Bits 31: 21 Reserved, must be kept at reset value.
Bits 20: 16 FSIZE[4:0]: Flash memory size
Bits 15: 11 Reserved, must be kept at reset value.
Bits 10:8 CSHT[2:0]: Chip select high time
Bits 7: 1 Reserved, must be kept at reset value.
Bit 0 CKMODE: Mode 0 / mode 3
15.5.3

QUADSPI status register (QUADSPI_SR)

Address offset: 0x0008
Reset value: 0x0000 0000
31 30 29 28
Res. Res. Res. Res.
15 14 13 12
Res. Res. Res.
r
Bits 31:13 Reserved, must be kept at reset value.
Bits 12:8 FLEVEL[4:0]: FIFO level
Bits 7:6 Reserved, must be kept at reset value.
This field defines the size of external memory using the following formula:
Number of bytes in Flash memory = 2
FSIZE+1 is effectively the number of address bits required to address the Flash
memory. The Flash memory capacity can be up to 4GB (addressed using 32 bits) in
indirect mode, but the addressable space in memory-mapped mode is limited to
256MB.
This field can be modified only when BUSY = 0.
CSHT+1 defines the minimum number of CLK cycles which the chip select (nCS) must
remain high between commands issued to the Flash memory.
0: nCS stays high for at least 1 cycle between Flash memory commands
1: nCS stays high for at least 2 cycles between Flash memory commands
...
7: nCS stays high for at least 8 cycles between Flash memory commands
This field can be modified only when BUSY = 0.
This bit indicates the level that CLK takes between commands (when nCS = 1).
0: CLK must stay low while nCS is high (chip select released). This is referred to as
mode 0.
1: CLK must stay high while nCS is high (chip select released). This is referred to as
mode 3.
This field can be modified only when BUSY = 0.
27 26 25 24
Res. Res. Res. Res.
11 10 9 8
FLEVEL[4:0]
r r r r
This field gives the number of valid bytes which are being held in the FIFO. FLEVEL = 0
when the FIFO is empty, and 16 when it is full. In memory-mapped mode and in
automatic status polling mode, FLEVEL is zero.
DocID024597 Rev 3
Quad-SPI interface (QUADSPI)
[FSIZE+1]
23 22 21 20
Res. Res. Res. Res.
7 6 5 4
Res. Res. BUSY TOF
r r
19 18 17
Res. Res. Res. Res.
3 2 1
SMF FTF TCF TEF
r r r
417/1693
16
0
r
425