ST STM32L4x6 Reference Manual page 231

RM0351
Bit 2 SWPMI1EN: Single wire protocol clock enable
Bit 1 Reserved, must be kept at reset value.
Bit 0 LPUART1EN: Low power UART 1 clock enable
Set and cleared by software.
0: SWPMI1 clock disable
1: SWPMI1 clock enable
Set and cleared by software.
0: LPUART1 clock disable
1: LPUART1 clock enable
DocID024597 Rev 3
Reset and clock control (RCC)
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