ST STM32L4x6 Reference Manual page 650

Digital filter for sigma delta modulators (DFSDM)
Table 126. DFSDM register map and reset values (continued)
Offset Register
DFSDM_
CHCFG4R2
0x84
reset value 0
DFSDM_
AWSCD4R
0x88
reset value
DFSDM_
CHWDAT4R
0x8C
reset value
DFSDM_
CHDATIN4R
0x90
reset value 0
0x94 -
Reserved
0x9C
DFSDM_
CHCFG5R1
0xA0
reset value
DFSDM_
CHCFG5R2
0xA4
reset value 0
DFSDM_
AWSCD5R
0xA8
reset value
DFSDM_
CHWDAT5R
0xAC
reset value
DFSDM_
CHDATIN5R
0xB0
reset value 0
0xB4 -
Reserved
0xBC
DFSDM_
CHCFG6R1
0xC0
reset value
DFSDM_
CHCFG6R2
0xC4
reset value 0
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0 0 0 0 0 0 0 0 0
0 0
INDAT1[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0
INDAT1[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
DocID024597 Rev 3
OFFSET[23:0]
0 0 0 0 0 0 0 0
AWFOSR[4:0] BKSCD[3:0]
0 0 0 0 0 0 0
0 0
0 0 0 0 0 0 0 0
0 0
OFFSET[23:0]
0 0 0 0 0 0 0 0
AWFOSR[4:0] BKSCD[3:0]
0 0 0 0 0 0 0
0 0
0 0 0 0 0 0 0 0
0 0
OFFSET[23:0]
0 0 0 0 0 0 0 0
DTRBS[4:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0
WDATA[15:0]
0 0 0 0 0 0 0 0 0
INDAT0[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
DTRBS[4:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0
WDATA[15:0]
0 0 0 0 0 0 0 0 0
INDAT0[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
DTRBS[4:0]
0 0 0 0 0 0 0 0 0
RM0351
0 0
SCDT[7:0]
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0
0 0
SCDT[7:0]
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0
0 0