Tim8 Option Register 2 (Tim8_Or2) - ST STM32L4x6 Reference Manual

Advanced-control timers (TIM1/TIM8)
Bit 1 BK2CMP1E: BRK2 COMP1 enable
This bit enables the COMP1 for the timer's BRK2 input. COMP1 output is 'ORed' with the
other BRK2 sources.
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK
Bit 0 BK2INE: BRK2 BKIN input enable
This bit enables the BKIN2 alternate function input for the timer's BRK2 input. BKIN2 input is
'ORed' with the other BRK2 sources.
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK
Note: Refer to
26.4.28

TIM8 option register 2 (TIM8_OR2)

Address offset: 0x60
Reset value: 0x0000 0001
31 30 29 28
Res. Res. Res. Res.
15 14 13 12
ETRSEL[1:0] Res. Res.
rw rw
Bits 31:17 Reserved, must be kept at reset value
Bits 16:14 ETRSEL[2:0]: ETR source selection
This bit selects the ETR input source.
Note: These bits can not be modified as long as LOCK level 1 has been programmed (LOCK
Bits 13:12 Reserved, must be kept at reset value
Bit 11 BKCMP2P: BRK COMP2 input polarity
This bit selects the COMP2 input sensitivity. It must be programmed together with the BKP
polarity bit.
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK
848/1693
0: COMP1 input disabled
1: COMP1 input enabled
bits in TIMx_BDTR register).
0: BKIN2 input disabled
1: BKIN2 input enabled
bits in TIMx_BDTR register).
Figure 232: Break and Break2 circuitry
27 26 25
Res. Res. Res.
11 10 9
BKCM BKCM BKDFBK
BKINP
P2P P1P
rw rw rw
000: ETR legacy mode
001: COMP1 output connected to ETR input
010: COMP2 output connected to ETR input
Other codes reserved
bits in TIMx_BDTR register).
0: COMP2 input is active high
1: COMP2 input is active low
bits in TIMx_BDTR register).
overview.
24 23 22 21
Res. Res. Res. Res.
8 7 6 5
Res. Res. Res.
2E
rw
DocID024597 Rev 3
20 19 18
Res. Res. Res.
4 3 2
BKCMP2 BKCMP
Res. Res.
E
rw
RM0351
17 16
ETRSEL
Res.
[2]
rw
1 0
BKINE
1E
rw rw