Dfsdm_Awscdyr) (Y=0..7) - ST STM32L4x6 Reference Manual

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Digital filter for sigma delta modulators (DFSDM)
Bits 31:8 OFFSET[23:0]: 24-bit calibration offset for channel y
For channel y, OFFSET is applied to the results of each conversion from this channel.
This value is set by software.
Bits 7:3 DTRBS[4:0]: Data right bit-shift for channel y
0-31: Defines the shift of the data result coming from the integrator - how many bit shifts to the right
will be performed to have final results. Bit-shift is performed before offset correction. The data shift is
rounding the result to nearest integer value. The sign of shifted result is maintained (to have valid
24-bit signed format of result data).
This value can be modified only when CHEN=0 (in DFSDM_CHCFGyR1 register).
Bits 2:0 Reserved, must be kept at reset value.
21.6.3
DFSDM analog watchdog and short-circuit detector register

(DFSDM_AWSCDyR) (y=0..7)

Short-circuit detector and analog watchdog settings for channel y
Address offset: 0x08
Reset value: 0x0000 0000
31
30
29
28
Res.
Res.
Res.
Res.
15
14
13
12
BKSCD[3:0]
rw
rw
rw
rw
Bits 31:24 Reserved, must be kept at reset value.
Bits 23:22 AWFORD[1:0]: Analog watchdog Sinc filter order on channel y
0: FastSinc filter type
1
1: Sinc
2
2: Sinc
3
3: Sinc
x
Sinc
filter type transfer function:
FastSinc filter type transfer function:
This bit can be modified only when CHEN=0 (in DFSDM_CHCFGyR1 register).
Bit 21 Reserved, must be kept at reset value.
Bits 20:16 AWFOSR[4:0]: Analog watchdog filter oversampling ratio (decimation rate) on channel y
0 - 31: Defines the length of the Sinc type filter in the range 1 - 32 (AWFOSR + 1). This number is
also the decimation ratio of the analog data rate.
This bit can be modified only when CHEN=0 (in DFSDM_CHCFGyR1 register).
Note: If AWFOSR = 0 then the filter has no effect (filter bypass).
632/1693
27
26
25
Res.
Res.
Res.
11
10
9
Res.
Res.
Res.
filter type
filter type
filter type
DocID024597 Rev 3
24
23
22
21
Res.
AWFORD[1:0]
Res.
rw
rw
8
7
6
5
Res.
rw
rw
rw
FOSR
1 z
---------------------------- -
H z ( )
=
1
1 z
FOSR
1 z
H z ( )
---------------------------- -
=
1
1 z
20
19
18
AWFOSR[4:0]
rw
rw
rw
4
3
2
SCDT[7:0]
rw
rw
rw
x
2
(
)
2
FOSR
(
)
1
z
+
RM0351
17
16
rw
rw
1
0
rw
rw

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