RM0351
Bit 1 CC1P: Capture/Compare 1 output polarity
CC1 channel configured as output:
CC1 channel configured as input: CC1NP/CC1P bits select the active polarity of TI1FP1
and TI2FP1 for trigger or capture operations.
Note: This bit is not writable as soon as LOCK level 2 or 3 has been programmed (LOCK bits
Note: On channels having a complementary output, this bit is preloaded. If the CCPC bit is
Bit 0 CC1E: Capture/Compare 1 output enable
CC1 channel configured as output:
CC1 channel configured as input: This bit determines if a capture of the counter value can
actually be done into the input capture/compare register 1 (TIMx_CCR1) or not.
Note: On channels having a complementary output, this bit is preloaded. If the CCPC bit is
0: OC1 active high
1: OC1 active low
00: non-inverted/rising edge. The circuit is sensitive to TIxFP1 rising edge (capture or trigger
operations in reset, external clock or trigger mode), TIxFP1 is not inverted (trigger operation
in gated mode or encoder mode).
01: inverted/falling edge. The circuit is sensitive to TIxFP1 falling edge (capture or trigger
operations in reset, external clock or trigger mode), TIxFP1 is inverted (trigger operation in
gated mode or encoder mode).
10: reserved, do not use this configuration.
11: non-inverted/both edges/ The circuit is sensitive to both TIxFP1 rising and falling edges
(capture or trigger operations in reset, external clock or trigger mode), TIxFP1 is not inverted
(trigger operation in gated mode). This configuration must not be used in encoder mode.
in TIMx_BDTR register).
set in the TIMx_CR2 register then the CC1P active bit takes the new value from the
preloaded bit only when a Commutation event is generated.
0: Off - OC1 is not active. OC1 level is then function of MOE, OSSI, OSSR, OIS1, OIS1N
and CC1NE bits.
1: On - OC1 signal is output on the corresponding output pin depending on MOE, OSSI,
OSSR, OIS1, OIS1N and CC1NE bits.
0: Capture disabled.
1: Capture enabled.
set in the TIMx_CR2 register then the CC1E active bit takes the new value from the
preloaded bit only when a Commutation event is generated.
DocID024597 Rev 3
Advanced-control timers (TIM1/TIM8)
831/1693
856
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