Table 46. Nor/Psram Bank Selection; Table 47. Nor/Psram External Memory Address; Figure 30. Fmc Memory Banks - ST STM32L4x6 Reference Manual

RM0351
14.4.1 NOR/PSRAM address mapping
HADDR[27:26] bits are used to select one of the four memory banks as shown in
1. HADDR are internal AHB address lines that are translated to external memory.
The HADDR[25:0] bits contain the external memory address. Since HADDR is a byte
address whereas the memory is addressed at word level, the address actually issued to the
memory varies according to the memory data width, as shown in the following table.
Memory width
8-bit
16-bit

Figure 30. FMC memory banks

Table 46. NOR/PSRAM bank selection

(1)
HADDR[27:26]
00
01
10
11

Table 47. NOR/PSRAM External memory address

(1)
Data address issued to the memory
HADDR[25:0]
HADDR[25:1] >> 1
DocID024597 Rev 3
Flexible static memory controller (FSMC)
Selected bank
Bank 1 - NOR/PSRAM 1
Bank 1 - NOR/PSRAM 2
Bank 1 - NOR/PSRAM 3
Bank 1 - NOR/PSRAM 4
Maximum memory capacity (bits)
Table
64 Mbytes x 8 = 512 Mbit
64 Mbytes/2 x 16 = 512 Mbit
347/1693
46.
399