Memory Map And Register Boundary Addresses; Table 1. Stm32L4X6 Memory Map And Peripheral Register Boundary Addresses - ST STM32L4x6 Reference Manual

RM0351
All the memory areas that are not allocated to on-chip memories and peripherals are
considered "Reserved". For the detailed mapping of available memory and register areas,
please refer to
2.2.2

Memory map and register boundary addresses

See the datasheet corresponding to your device for a comprehensive diagram of the
memory map.
The following table gives the boundary addresses of the peripherals available in the
devices.

Table 1. STM32L4x6 memory map and peripheral register boundary addresses

Bus Boundary address
0x5006 0800 - 0x5006 0BFF
0x5006 0400 - 0x5006 07FF
0x5006 0000 - 0x5006 03FF
0x5004 0400 - 0x5005 FFFF
0x5004 0000 - 0x5004 03FF
0x5000 0000 - 0x5003 FFFF
0x4800 2000 - 0x4FFF FFFF
0x4800 1C00 - 0x4800 1FFF
AHB2
0x4800 1800 - 0x4800 1BFF
0x4800 1400 - 0x4800 17FF
0x4800 1000 - 0x4800 13FF
0x4800 0C00 - 0x4800 0FFF
0x4800 0800 - 0x4800 0BFF
0x4800 0400 - 0x4800 07FF
0x4800 0000 - 0x4800 03FF
0x4002 4400 - 0x47FF FFFF
Memory map and register boundary addresses
Size (bytes)
1 KB
1 KB
1 KB
127 KB
1 KB
16 KB
~127 MB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
~127 MB
DocID024597 Rev 3
and peripheral sections.
Peripheral Peripheral register map
Section 24.4.4: RNG register
RNG
map
Reserved
Section 25.14.18: AES register
AES
map
Reserved
Section 16.6.4: ADC register
ADC
map
Section 43.15.54: OTG_FS
OTG_FS
register map
Reserved
Section 7.4.13: GPIO register
GPIOH
map
Section 7.4.13: GPIO register
GPIOG
map
Section 7.4.13: GPIO register
GPIOF
map
Section 7.4.13: GPIO register
GPIOE
map
Section 7.4.13: GPIO register
GPIOD
map
Section 7.4.13: GPIO register
GPIOC
map
Section 7.4.13: GPIO register
GPIOB
map
Section 7.4.13: GPIO register
GPIOA
map
Reserved
-
-
-
-
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