Table 139. Tsc Register Map And Reset Values; Tsc I/O Group X Counter Register (Tsc_Iogxcr) (X = 1..8) - ST STM32L4x6 Reference Manual

RM0351
Bits 23:16 GxS: Analog I/O group x status
These bits are set by hardware when the acquisition on the corresponding enabled analog I/O
group x is complete. They are cleared by hardware when a new acquisition is started.
Note: When a max count error is detected the remaining GxS bits of the enabled analog I/O
Bits 15:8 Reserved, must be kept at reset value.
Bits 7:0 GxE: Analog I/O group x enable
These bits are set and cleared by software to enable/disable the acquisition (counter is
counting) on the corresponding analog I/O group x.
23.6.10

TSC I/O group x counter register (TSC_IOGxCR) (x = 1..8)

Address offset: 0x30 + 0x04 x Analog I/O group number
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
Res. Res.
r
Bits 31:14 Reserved, must be kept at reset value.
Bits 13:0 CNT[13:0]: Counter value
These bits represent the number of charge transfer cycles generated on the analog I/O group
x to complete its acquisition (voltage across C
23.6.11 TSC register map
Offset Register
TSC_CR
0x0000
Reset value
TSC_IER
0x0004
Reset value
0: Acquisition on analog I/O group x is ongoing or not started
1: Acquisition on analog I/O group x is complete
groups are not set.
0: Acquisition on analog I/O group x disabled
1: Acquisition on analog I/O group x enabled
28 27 26 25
Res. Res. Res.
12 11 10 9
r r r r

Table 139. TSC register map and reset values

CTPH[3:0] CTPL[3:0]
0 0 0 0 0 0 0 0 0
24 23 22
Res. Res. Res.
8 7 6
CNT[13:0]
r r r
has reached the threshold).
S
SSD[6:0]
0 0 0 0 0 0 0 0
DocID024597 Rev 3
Touch sensing controller (TSC)
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
r r r
MCV
[2:0]
0 0 0 0 0
17 16
Res. Res.
1 0
r r r
0 0 0 0 0 0
0 0
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