Pwr Register Map And Reset Value Table; Table 29. Pwr Register Map And Reset Values - ST STM32L4x6 Reference Manual

RM0351
5.4.24

PWR register map and reset value table

Offset Register
PWR_CR1
0x000
Reset value
PWR_CR2
0x004
Reset value
PWR_CR3
0x008
Reset value
PWR_CR4
0x00C
Reset value
PWR_SR1
0x010
Reset value
PWR_SR2
0x014
Reset value
PWR_SCR
0x018
Reset value
PWR_PUCRA
0x020
Reset value
PWR_PDCRA
0x024
Reset value
PWR_PUCRB
0x028
Reset value
PWR_PDCRB
0x02C
Reset value
PWR_PUCRC
0x030
Reset value
PWR_PDCRC
0x034
Reset value
PWR_PUCRD
0x038
Reset value
PWR_PDCRD
0x03C
Reset value
PWR_PUCRE
0x040
Reset value

Table 29. PWR register map and reset values

DocID024597 Rev 3
Power control (PWR)
VOS
[1:0]
0 0 1 0
0 0 0
1 0 0
0 0
0 0
0 0 0 0 0 0 0 0
0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
LPMS
[2:0]
0 0 0
PLS [2:0]
0 0 0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
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