ST STM32L4x6 Reference Manual page 91

RM0351
1. Check that no Flash memory operation is ongoing by checking the BSY bit in the
status register (FLASH_SR)
in bank 1 or bank 2).
2. Set MER1 or MER2 to in the
3. Set the STRT bit in the FLASH_CR register.
4. Wait for the BSY bit to be cleared (or use the EOP interrupt).
Read from bank 1 while programming bank 2 (or vice versa)
While executing a program code from bank 1, it is possible to perform a program operation
on the bank 2. (and vice versa). Follow the procedure below:
1. Check that no Flash memory operation is ongoing by checking the BSY bit in the
status register (FLASH_SR)
on bank 1 or bank 2).
2. Set the PG bit in the
3. Perform the data write operations at the desired address memory inside the main
memory block or OTP area.
4. Wait for the BSY bit to be cleared (or use the EOP interrupt).
(BSY is active when erase/program operation is on going
Flash control register
(BSY is active when erase/program operation is on going
Flash control register
DocID024597 Rev 3
Embedded Flash memory (FLASH)
(FLASH_CR).
(FLASH_CR).
Flash
Flash
91/1693
120