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RM0351
Reset value: 0x0000 XXXX (factory trimmed values)
31
30
29
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Bits 31:13 Reserved, must be kept at reset value.
Bits 12:8 TRIMLPOFFSETP[4:0]: Low-power mode trim for PMOS differential pairs
Bits 7:5 Reserved, must be kept at reset value.
Bits 4:0 TRIMLPOFFSETN[4:0]: Low-power mode trim for NMOS differential pairs
20.5.4
OPAMP2 control/status register (OPAMP2_CSR)
Address offset: 0x10
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
15
14
13
CAL
USER
CAL
CALON
OUT
TRIM
SEL
r
rw
rw
Bits 31:16 Reserved, must be kept at reset value.
Bit 15 CALOUT: Operational amplifier calibration output
During calibration mode offset is trimmed when this signal toggle.
Bit 14 USERTRIM: allows to switch from 'factory' AOP offset trimmed values to AOP offset 'user'
trimmed values
This bit is active for both mode normal and low-power.
Bit 13 CALSEL: Calibration selection
Bit 12 CALON: Calibration mode enabled
Bit 11 Reserved, must be kept at reset value.
Bit 10 VP_SEL: Non inverted input selection
28
27
26
25
Res.
Res.
Res.
Res.
12
11
10
9
TRIMLPOFFSETP
rw
rw
rw
rw
28
27
26
25
Res.
Res.
Res.
Res.
12
11
10
9
VP_
Res.
VM_SEL
SEL
rw
rw
rw
0: 'factory' trim code used
1: 'user' trim code used
0: NMOS calibration (200mV applied on OPAMP inputs)
1: PMOS calibration (VDDA-200mV applied on OPAMP inputs)
0: Normal mode
1: Calibration mode (all switches opened by HW)
0: GPIO connected to VINP
1: DAC connected to VINP
DocID024597 Rev 3
24
23
22
21
Res.
Res.
Res.
Res.
8
7
6
5
Res.
Res.
Res.
rw
24
23
22
21
Res.
Res.
Res.
Res.
8
7
6
5
Res.
Res.
PGA_GAIN
rw
rw
Operational amplifiers (OPAMP)
20
19
18
Res.
Res.
Res.
4
3
2
TRIMLPOFFSETN
rw
rw
rw
20
19
18
Res.
Res.
Res.
4
3
2
OPAMODE
rw
rw
w
17
16
Res.
Res.
1
0
rw
rw
17
16
Res.
Res.
1
0
OPA
OPAEN
LPM
rw
rw
599/1693
602
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