Table 88. Adc1, Adc2 And Adc3 - External Triggers For Regular Channels; Figure 70. Triggers Are Shared Between Adc Master And Adc Slave - ST STM32L4x6 Reference Manual

RM0351
Note: The regular trigger selection cannot be changed on-the-fly.
The injected trigger selection can be anticipated and changed on-the-fly. Refer to
Section 16.3.21: Queue of context for injected conversions on page 453
Each ADC master shares the same input triggers with its ADC slave as described in
Figure 70.
Table 88
injected conversion.

Table 88. ADC1, ADC2 and ADC3 - External triggers for regular channels

Name
EXT0
EXT1
EXT2
EXT3
EXT4
EXT5
EXT6
EXT7
EXT8
EXT9

Figure 70. Triggers are shared between ADC master and ADC slave

to Table 89 give all the possible external triggers of the three ADCs for regular and
Source
TIM1_CC1 event
TIM1_CC2 event
TIM1_CC3 event
TIM2_CC2 event
TIM3_TRGO event
TIM4_CC4 event
EXTI line 11
TIM8_TRGO event
TIM8_TRGO2 event
TIM1_TRGO event
DocID024597 Rev 3
Analog-to-digital converters (ADC)
Type
Internal signal from on-chip timers
Internal signal from on-chip timers
Internal signal from on-chip timers
Internal signal from on-chip timers
Internal signal from on-chip timers
Internal signal from on-chip timers
External pin
Internal signal from on-chip timers
Internal signal from on-chip timers
Internal signal from on-chip timers
EXTSEL[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
449/1693
540