Analog-to-digital converters (ADC)
16.5.13
ADC regular sequence register 3 (ADCx_SQR3)
Address offset: 0x38
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
15
14
13
SQ12[3:0]
rw
rw
rw
Bits 31:29 Reserved, must be kept at reset value.
Bits 28:24 SQ14[4:0]: 14th conversion in regular sequence
Note: Software is allowed to write these bits only when ADSTART=0 (which ensures that no
Bit 23 Reserved, must be kept at reset value.
Bits 22:18 SQ13[4:0]: 13th conversion in regular sequence
Note: Software is allowed to write these bits only when ADSTART=0 (which ensures that no
Bit 17 Reserved, must be kept at reset value.
Bits 16:12 SQ12[4:0]: 12th conversion in regular sequence
Note: Software is allowed to write these bits only when ADSTART=0 (which ensures that no
Bit 11 Reserved, must be kept at reset value.
Bits 10:6 SQ11[4:0]: 11th conversion in regular sequence
Note: Software is allowed to write these bits only when ADSTART=0 (which ensures that no
Bit 5 Reserved, must be kept at reset value.
Bits 4:0 SQ10[4:0]: 10th conversion in regular sequence
Note: Software is allowed to write these bits only when ADSTART=0 (which ensures that no
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28
27
26
25
SQ14[4:0]
rw
rw
rw
rw
12
11
10
9
Res.
rw
rw
rw
These bits are written by software with the channel number (0..18) assigned as the 14th in
the regular conversion sequence.
regular conversion is ongoing).
These bits are written by software with the channel number (0..18) assigned as the 13th in
the regular conversion sequence.
regular conversion is ongoing).
These bits are written by software with the channel number (0..18) assigned as the 12th in
the regular conversion sequence.
regular conversion is ongoing).
These bits are written by software with the channel number (0..18) assigned as the 11th in
the regular conversion sequence.
regular conversion is ongoing).
These bits are written by software with the channel number (0..18) assigned as the 10th in
the regular conversion sequence.
regular conversion is ongoing).
24
23
22
Res.
rw
rw
8
7
6
SQ11[4:0]
rw
rw
rw
DocID024597 Rev 3
21
20
19
18
SQ13[4:0]
rw
rw
rw
rw
5
4
3
2
Res.
SQ10[4:0]
rw
rw
rw
RM0351
17
16
Res.
SQ12[4]
rw
1
0
rw
rw
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