Table 149. Output Control Bits For Complementary Ocx And Ocxn Channels With Break Feature - ST STM32L4x6 Reference Manual

Advanced-control timers (TIM1/TIM8)

Table 149. Output control bits for complementary OCx and OCxN channels with break feature

Control bits
MOE bit OSSI bit OSSR bit CCxE bit CCxNE bit
1 X
0
0
1
1. When both outputs of a channel are not used (control taken over by GPIO), the OISx, OISxN, CCxP and CCxNP bits must
be kept cleared.
Note: The state of the external I/O pins connected to the complementary OCx and OCxN channels
depends on the OCx and OCxN channel state and the GPIO registers.
832/1693
X 0 0
0 0 1
0 1 0
X 1 1
1 0 1
1 1 0
X X
0 0
0 1
1 0
X
1 1
DocID024597 Rev 3
Output states
OCx output state
Output disabled (not driven by the timer: Hi-Z)
OCx=0, OCxN=0
Output disabled (not driven
by the timer: Hi-Z)
OCx=0
OCxREF + Polarity
OCx=OCxREF xor CCxP
OCREF + Polarity + dead-
time
Off-State (output enabled
with inactive state)
OCx=CCxP
OCxREF + Polarity
OCx=OCxREF xor CCxP
Output Disabled (not driven by the
OCx=CCxP, OCxN=CCxNP
Off-State (output enabled with inactive state)
Asynchronously: OCx=CCxP, OCxN=CCxNP (if BRK or
BRK2 is triggered).
Then (this is valid only if BRK is triggered), if the clock is
present: OCx=OISx and OCxN=OISxN after a dead-time,
assuming that OISx and OISxN do not correspond to OCX
and OCxN both in active state (may cause a short circuit
when driving switches in half-bridge configuration).
Note: BRK2 can only be used if OSSI = OSSR = 1.
RM0351
(1)
OCxN output state
OCxREF + Polarity
OCxN = OCxREF xor CCxNP
Output Disabled (not driven by
the timer: Hi-Z)
OCxN=0
Complementary to OCREF (not
OCREF) + Polarity + dead-time
OCxREF + Polarity
OCxN = OCxREF x or CCxNP
Off-State (output enabled with
inactive state)
OCxN=CCxNP
timer: Hi-Z)