ST STM32L4x6 Reference Manual page 655

RM0351
Table 127. DFSDMx register map and reset values (continued)
Offset Register
DFSDM2_
JCHGR
0x310
reset value
DFSDM2_
FCR
0x314
reset value
0
DFSDM2_
JDATAR
0x318
reset value 0
DFSDM2_
RDATAR
0x31C
reset value 0
DFSDM2_
AWHTR
0x320
reset value 0
DFSDM2_
AWLTR
0x324
reset value 0
DFSDM2_
AWSR
0x328
reset value
DFSDM2_
AWCFR
0x32C
reset value
DFSDM2_
EXMAX
0x330
reset value 1
DFSDM2_
EXMIN
0x334
reset value 0
DFSDM2_
CNVTIMR
0x338
reset value
0
0x33C -
Reserved
0x3FC
DFSDM3_
CR1
0x400
reset value
0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0 0
RCH[2:0]
0 0 0 0 0
DocID024597 Rev 3
Digital filter for sigma delta modulators (DFSDM)
FOSR[9:0]
0 0 0 0 0 0
JDATA[23:0]
0 0 0 0 0 0 0 0
RDATA[23:0]
0 0 0 0 0 0 0 0
AWHT[23:0]
0 0 0 0 0 0 0 0
AWLT[23:0]
0 0 0 0 0 0 0 0
0 0
0 0
EXMAX[23:0]
0 0 0 0 0 0 0 0
EXMIN[23:0]
1 1 1 1 1 1 1 1
CNVCNT[27:0]
0 0 0 0 0 0 0 0
0 0 0 0 0
0 0
0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
AWHTF[7:0]
0 0 0 0 0 0 0 0
CLRAWHTF[7:0] CLRAWLTF[7:0]
0 0 0 0 0 0 0 0
0 0 0 0 0 0
1 1 1 1 1 1
0 0 0 0 0 0 0 0
0 0 0 0
JCHG[7:0]
0 0 0 0 0 1
IOSR[7:0]
0 0 0 0 0 0
0 0 0
RDATA
CH[2:0]
0 0 0 0
BKAWH[3:0]
0 0 0 0
BKAWL[3:0]
0 0 0 0
AWLTF[7:0]
0 0 0 0 0 0
0 0 0 0 0 0
EXMAX
CH[2:0]
0 0 0
0 0 0
0 0
0 0 0 0 0
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