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ST STM32L1 Series Application Note

ST STM32L1 Series Application Note

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Introduction
For designers of STM32 microcontroller applications, it is important to be able to easily
replace one microcontroller type by another one in the same product family. Migrating an
application to a different microcontroller is often needed when product requirements grow by
putting extra demands on memory size or increasing the number of I/Os. On the other hand,
cost reduction objectives are also be an argument to switch to smaller components and
shrink the PCB area.
This application note analyze the steps required to migrate an existing design from
STM32L1 Series to STM32L4 Series. It groups the most important information and lists the
vital aspects that need to be addressed.
This document lists the "full set" of features available for the STM32L1 and the equivalent
features on STM32L4 Series when available.
In order to migrate an application from STM32L1 Series to STM32L4 Series, these three
aspects need to be considered: the hardware migration, the peripheral migration and the
firmware migration.
To fully benefit from the information in this application note, the user should be familiar with
the STM32 microcontrollers documentation available on www.st.com, with focus on:
STM32L1 Series:
•
STM32L1xx reference manual (RM0038)
•
STM32L1xx datasheets
•
STM32L1 Flash and EEPROM programming manual (PM0062)
STM32L4 Series:
•
STM32L4x6 reference manual (RM0351)
•
STM32L4x3 reference manual (RM0394)
•
STM32L4x2 reference manual (RM0393)
•
STM32L4xx datasheets.
March 2016
Migrating from STM32L1 Series to STM32L4 Series
DocID027094 Rev 3
AN4612
Application note
microcontrollers
1/58
www.st.com
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  • Page 1 PCB area. This application note analyze the steps required to migrate an existing design from STM32L1 Series to STM32L4 Series. It groups the most important information and lists the vital aspects that need to be addressed. This document lists the “full set” of features available for the STM32L1 and the equivalent features on STM32L4 Series when available.

  • Page 2: Table Of Contents

    Contents AN4612 Contents STM32L4 Series overview ........6 Hardware migration .
  • Page 3 AN4612 Contents Revision history ......... . . 57 DocID027094 Rev 3 3/58...
  • Page 4 Packages available on STM32L4xx series ........8 Table 3. STM32L1 Series and STM32L4 Series pinout differences (QFP) ....8 Table 4.
  • Page 5 AN4612 List of figures List of figures Figure 1. LQFP144 compatible board design ......... . 11 Figure 2.

  • Page 6: Stm32L4 Series Overview

    In particular, the STM32L4 Series allows higher frequency/performance operation than ® ® STM32L1 Series, including a Cortex -M4 @80 MHz versus Cortex -M3 @32 MHz and optimized Flash memory access through the adaptive real-time memory accelerator (ART Accelerator™).
  • Page 7 AN4612 STM32L4 Series overview This migration guide is only covering migration from STM32L1 to STM32L4 and as a consequence new features present on STM32L4 Series but not already present on STM32L1 are not covered in this document (please refer to the STM32L4 reference manuals and datasheets for an exhaustive picture).

  • Page 8: Hardware Migration

    Table 3 Table For the WLCSP packages the transition is less easy because the pinout is different. This is due to the fact that devices of STM32L1 Series and STM32L4 Series have different die sizes. asdf Table 3. STM32L1 Series and STM32L4 Series pinout differences (QFP)

  • Page 9: Table 4. Stm32L1 Series And Stm32L4 Series Pinout Differences (Bga)

    AN4612 Hardware migration Table 3. STM32L1 Series and STM32L4 Series pinout differences (QFP) (continued) STM32L1 Series STM32L4 Series Pinout Pinout VDDIO2 VDDUSB VDDUSB BOOT0 PH3-BOOT0 1. Only for cat. 4 devices 2. VDDIO2 and VDDUSB pins can be connected externally to V Table 4.
  • Page 10 • PF9 (pin J6) mapped to PG8 on same pin On BGA64, ball G1 used for VREF+ signal on STM32L1 Series is now used as GPIO PC3 (multiplexed with VLCD) on STM32L4 Series and the VREF+ signal is multiplexed with VDDA on ball H1.

  • Page 11: Figure 1. Lqfp144 Compatible Board Design

    AN4612 Hardware migration Figure 1. LQFP144 compatible board design Figure 2. LQFP100 compatible board design Figure 3. LQFP64 compatible board design DocID027094 Rev 3 11/58...

  • Page 12: Figure 4. Lqfp48 Compatible Board Design

    Hardware migration AN4612 Figure 4. LQFP48 compatible board design Figure 5. BGA132 compatible board design 12/58 DocID027094 Rev 3...

  • Page 13: Figure 6. Bga100 Compatible Board Design

    AN4612 Hardware migration Figure 6. BGA100 compatible board design Figure 7. BGA64 compatible board design DocID027094 Rev 3 13/58...

  • Page 14: Boot Mode Selection

    Boot mode selection AN4612 Boot mode selection Both STM32L1 and STM32L4 Series can select boot modes between three options: boot from main Flash memory, boot from SRAM or boot from system memory. However, the way to select the boot mode differs between the products. In the STM32L1 lines, the boot mode is selected with two pins BOOT0 and BOOT1.

  • Page 15: Table 7. Bootloader Interfaces

    (0xFFFF FFFF) and if the boot selection was configured to boot from the main Flash. Embedded bootloader The embedded bootloader is located in the system memory, programmed by ST during production. It is used to reprogram the Flash memory using one of the following serial interfaces: Table 7.
  • Page 16 Boot mode selection AN4612 Table 7. Bootloader interfaces (continued) Peripheral STM32L1 STM32L4 I2C3_SCL (PC0) I2C3 I2C3_SDA (PC1) SPI1_NSS (PA4) SPI1_SCK (PA5) SPI1 SPI1_MISO (PA6) SPI1_MOSI (PA7) SPI2_NSS (PB12) SPI2_SCK (PB13) SPI2 SPI2_MISO (PB14) SPI2_MOSI (PB15) SPI3_NSS (PA15) SPI3_SCK (PC10) SPI3 SPI3_MISO (PC11) SPI3_MOSI (PC12) CAN1_RX (PB8)

  • Page 17: Peripheral Migration

    The “software compatibility” mentioned in the table below only refers to the register description for “low level” drivers. The STMCube™ hardware abstraction layer (HAL) between STM32L1 and STM32L4 Series is compatible. Table 8. Peripheral compatibility analysis STM32L1 Series versus STM32L4 Series Compatibility inst. (migrating from STM32L1 Series to STM32L4 Series) Peripheral inst.
  • Page 18 Peripheral migration AN4612 Table 8. Peripheral compatibility analysis STM32L1 Series versus STM32L4 Series (continued) Compatibility inst. (migrating from STM32L1 Series to STM32L4 Series) Peripheral inst. Cat. in L1 Software Pinout Comments Same features. Full Compatibility DMA mapping request may differ (see Section 4.3:...
  • Page 19 AN4612 Peripheral migration Table 8. Peripheral compatibility analysis STM32L1 Series versus STM32L4 Series (continued) Compatibility inst. (migrating from STM32L1 Series to STM32L4 Series) Peripheral inst. Cat. in L1 Software Pinout Comments Some pins not mapped on same GPIO. OPAMP No compatibility Partial compatibility One less OPAMP in STM32L4 Series.

  • Page 20: Memory Mapping

    The peripheral address mapping has been changed in the STM32L4 Series versus the STM32L1 Series. The table below provides the peripheral address mapping correspondence between STM32L1 and STM32L4 Series. Table 9. Peripheral address mapping differences between STM32L1 Series and STM32L4 Series STM32L1 Series STM32L4 Series...
  • Page 21 AN4612 Peripheral migration Table 9. Peripheral address mapping differences between STM32L1 Series and STM32L4 Series (continued) STM32L1 Series STM32L4 Series Peripheral Base address Base address COMP 0x40007C00 APB2 0x40010200 0x40007C04 OPAMP 0x40007C5C APB1 0x40007800 0x40007400 0x40007400 APB1 0x40007000 0x40007000 USB device FS SRAM...
  • Page 22 Table 9. Peripheral address mapping differences between STM32L1 Series and STM32L4 Series (continued) STM32L1 Series STM32L4 Series Peripheral Base address Base address Peripherals available in STM32L4 Series and not available in STM32L1 Series 0x50060800 AHB2 USB OTG FS 0x50000000 AHB1 0x40024000...
  • Page 23 AN4612 Peripheral migration The STM32L4 Series features an additional SRAM (SRAM2) of 32 Kbyte on Cat. 2 devices and 16 Kbyte on Cat. 4 devices. The SRAM2 includes additional features listed below: • Maximum performance through ICode bus access without physical remap •...

  • Page 24: Dma

    STM32L1 and STM32L4 Series embed two DMA controllers, up to 7+5 channels for STM32L1 Series and 7+7 channels for STM32L4 Series. Each channel is dedicated to managing memory access requests from one or more peripherals. It has an arbiter for handling the priority between DMA requests.
  • Page 25 AN4612 Peripheral migration Table 10. DMA request differences migrating STM32L1 Series to STM32L4 Series (continued) Peripheral DMA request STM32L1 Series STM32L4 Series I2C2_Rx DMA1_Channel5 DMA1_Channel5 I2C2 I2C2_Tx DMA1_Channel4 DMA1_Channel4 SDIO SDIO DMA2_Channel4 DMA2_Channel4 SDMMC SDMMC DMA2_Channel5 TIM2_UP DMA1_Channel2 DMA1_Channel2 TIM2_CH1...

  • Page 26: Interrupts

    Peripheral migration AN4612 Interrupts The table below presents the interrupt vectors in the STM32L4 Series versus the STM32L1 Series. Table 11. Interrupt vector differences between STM32L1 Series and STM32L4 Series STM32L1 Position STM32L4 Series Cat.1 and Cat.3 Cat.4 and Cat.5 Cat.2...
  • Page 27 AN4612 Peripheral migration Table 11. Interrupt vector differences between STM32L1 Series and STM32L4 Series (continued) STM32L1 Position STM32L4 Series Cat.1 and Cat.3 Cat.4 and Cat.5 Cat.2 TIM2 TIM2 TIM3 TIM3 TIM4 TIM4 I2C1_EV I2C1_EV I2C1_ER I2C1_ER I2C2_EV I2C2_EV I2C2_ER I2C2_ER...
  • Page 28 Peripheral migration AN4612 Table 11. Interrupt vector differences between STM32L1 Series and STM32L4 Series (continued) STM32L1 Position STM32L4 Series Cat.1 and Cat.3 Cat.4 and Cat.5 Cat.2 DMA2_Channel5 DFSDM1 DFSDM2 DFSDM3 COMP LPTIM1 LPTIM2 OTG_FS (Cat. 2 devices) USB_FS (Cat. 4...

  • Page 29: Rcc

    AN4612 Peripheral migration The main differences related to the RCC (reset and clock controller), between the STM32L4 Series and the STM32L1 Series, are presented in the table below. Table 12. RCC differences between STM32L1 and STM32L4 Series STM32L1 Series STM32L4 Series MSI is a low power oscillator with programmable frequency up to 48 MHz.
  • Page 30 Peripheral migration AN4612 Table 12. RCC differences between STM32L1 and STM32L4 Series (continued) STM32L1 Series STM32L4 Series AHB frequency Up to 32 MHz Up to 80 MHz APB1 frequency Up to 32 MHz Up to 80 MHz APB2 frequency Up to 32 MHz...

  • Page 31: Performance Versus Vcore Ranges

    Peripheral access configuration Since the address mapping of some peripherals has been changed in the STM32L4 Series versus the STM32L1 Series, different registers need to be used to [enable/disable] or [enter/exit] the peripheral [clock] or [from reset mode]. Table 14. RCC registers used for peripheral access configuration...

  • Page 32: Peripheral Clock Configuration

    Used to [enable/disable] the APB2 peripheral RCC_APB2LPENR RCC_APB2SMENR clock in sleep mode 1. The register configuring the peripherals is not present in STM32L1 Series, so it should not be needed from a migration-only stand point The configuration to access a given peripheral involves: •...
  • Page 33 • U(S)ARTs: In STM32L1 Series, the U(S)ART clock is APB1 or APB2 clock (depending on which APB bus the U(S)ART) is mapped to. In STM32L4 Series, the U(S)ART clock is derived from one of the four following sources: system clock (SYSCLK), HSI16, LSE, APB1 or APB2 clock (depending on which APB bus the U(S)ART is mapped to).

  • Page 34: Pwr

    Peripheral migration AN4612 In STM32L4 Series the PWR controller presents some differences versus STM32L1 Series, these differences are summarized in Table Table 15. PWR differences between STM32L1 Series and STM32L4 Series STM32L1 Series STM32L4 Series = 1.8 V (at power on) or 1.65 V (at power down) to = 1.71 to 3.6 V: external power supply...
  • Page 35 AN4612 Peripheral migration Table 15. PWR differences between STM32L1 Series and STM32L4 Series (continued) STM32L1 Series STM32L4 Series – RTC with backup registers (128 bytes) Battery – LSE backup – PC13 to PC15 I/Os domain – 3 tamper pins Integrated POR / PDR circuitry...
  • Page 36 Peripheral migration AN4612 Table 15. PWR differences between STM32L1 Series and STM32L4 Series (continued) STM32L1 Series STM32L4 Series Sleep mode Sleep mode Any peripheral interrupt/wakeup event Any peripheral interrupt/wakeup event Stop mode Stop mode Any EXTI line event/interrupt Any EXTI line event/interrupt...

  • Page 37: Rtc

    AN4612 Peripheral migration The STM32L4 and STM32L1 Series implement almost the same feature on the RTC. Table 16. RTC differences between STM32L1 Series and STM32L4 Series STM32L1 Series STM32L4 Series Coarse digital calibration (kept for compatibility only. New developments should only use Only smooth calibration available.

  • Page 38: Syscfg And Ri

    Peripheral migration AN4612 SYSCFG and RI The STM32L4 and STM32L1 Series implement almost the same feature on the SYSCFG. The table below shows the differences. Table 17. SYSCFG differences between STM32L1 Series and STM32L4 Series SYSCFG/RI STM32L1 Series STM32L4 Series TIM2/TIM3/TIM4’s input captures 1,2,3...

  • Page 39: Gpio

    GPIO The STM32L4 Series GPIO peripheral embeds identical features compared to STM32L1 Series. Minor adaptation of the code written for the STM32L1 Series using the GPIO may be required in STM32L4 Series due to: • Mapping of particular function on different GPIOs (see pinout difference in...

  • Page 40: Flash

    STM32L4 Series Flash memory programming procedures and registers are different from the STM32L1 Series, and any code written for the Flash memory interface in the STM32L1 Series needs to be rewritten to run in STM32L4 Series.
  • Page 41 AN4612 Peripheral migration Table 19. FLASH differences between STM32L1 Series and STM32L4 Series (continued) FLASH STM32L1 Series STM32L4 Series 0x1FFF 7800 - 0x1FFF 780F (bank1) 0x1FF8 0000 - 0x1FF8001F (all Cat.x) Option Bytes 0x1FFF F800 - 0x1FFF F80F (bank2) 0x1FF8 0080 - 0x1FF8 009F (Cat.4,5) (only bank1 for Cat.

  • Page 42: U(S)Art

    4.12 U(S)ART The STM32L4 Series implement several new features on the U(S)ART compared to STM32L1 Series. The table below shows the differences. Table 20. U(S)ART differences between STM32L1 Series and STM32L4 Series U(S)ART STM32L1 Series STM32L4 Series 3 ₓ USART 3 ₓ...
  • Page 43 AN4612 Peripheral migration Table 20. U(S)ART differences between STM32L1 Series and STM32L4 Series (continued) U(S)ART STM32L1 Series STM32L4 Series Wakeup from STOP mode (Start Bit, Received Byte, Address match). Support for ModBus communication: – Timeout feature – CR/LF character recognition.

  • Page 44: Table 21. I2C Differences Between Stm32L1 Series And Stm32L4 Series

    Peripheral migration AN4612 4.13 The STM32L4 implements a different I2C peripheral allowing easy software management. The table below shows the differences. Table 21. I2C differences between STM32L1 Series and STM32L4 Series STM32L1 Series STM32L4 Series Instances x2 (I2C1, I2C2) x3 (I2C1, I2C2, I2C3)

  • Page 45: Table 22. Spi Differences Between Stm32L1 Series And Stm32L4 Series

    AN4612 Peripheral migration 4.14 The STM32L4 and STM32L1 Series implement almost the same features on the SPI (apart from I2S). The table below shows the differences. Table 22. SPI differences between STM32L1 Series and STM32L4 Series STM32L1 Series STM32L4 Series...

  • Page 46: Table 23. Migrating From I2S To Sai

    STM32L4 does not include I2S interface part of the SPI peripheral, instead it includes two serial audio interfaces. The table below shows main differences between I2S and SAI. Table 23. Migrating from I2S to SAI I2S/SAI STM32L1 Series (I2S) STM32L4 Series (SAI) x2 (SAI1, SAI2) (Cat. 2 devices) Instances x1 (SAI1) (Cat. 4 devices) Two independent audio sub-blocks (per SAI) Full-duplex communication.
  • Page 47 Peripheral migration Table 23. Migrating from I2S to SAI (continued) I2S/SAI STM32L1 Series (I2S) STM32L4 Series (SAI) Master clock may be output to drive an external audio component. Ratio is fixed at 256 × Fs (where Fs is the audio sampling frequency)

  • Page 48: Figure 8. Generation Of Clock For Sai Master Mode (In Case Mclk Is Needed)

    Peripheral migration AN4612 When the clock is derived from one of the three internal PLLs, the three PLL inputs are either HSI16, HSE or MSI (between 4 and 8 MHz) divided by a programmable factor PLLM (from 1 to 8). This input is then multiplied by PLLN (from 8 to 86) to reach PLL VCO frequency (should be between 64 and 344 MHz).

  • Page 49: Table 24. Crc Differences Between Stm32L1 Series And Stm32L4 Series

    The cyclic redundancy check (CRC) calculation unit is very similar in STM32L1 and STM32L4 Series. The table below shows the differences. Table 24. CRC differences between STM32L1 Series and STM32L4 Series STM32L1 Series STM32L4 Series Single input/output 32-bit data register.

  • Page 50: Table 25. Aes Differences Between Stm32L1 Series And Stm32L4 Series

    = Same feature, but specification change or enhancement 4.17 The STM32L4 Series LCD implements the same features than the STM32L1 Series except for additional internal output buffers that allow to further improve contrast (it is possible to use output buffers instead of high drive resistive network).

  • Page 51: Table 26. Usb Differences Between Stm32L1 Series And Stm32L4 Series

    4.18 The STM32L4 and STM32L1 Series implement different USB peripherals. While STM32L1 Series implements a USB FS device interface, the STM32L4 Series implements a USB OTG FS interface. on Cat. 2 devices and a USB FS device only on Cat.

  • Page 52: Table 27. Adc Differences Between Stm32L1 Series And Stm32L4 Series

    On STM32L4 Cat. 4 devices, a Clock Recovery System (CRS) block is included that can provide a precise clock to the USB peripheral. 4.19 The table below presents the differences between the ADC peripheral of STM32L1 Series and STM32L4 Series, these differences are the following: •...
  • Page 53 AN4612 Peripheral migration Table 27. ADC differences between STM32L1 Series and STM32L4 Series (continued) STM32L1 Series STM32L4 Series External event for External event for External event for External event for regular group injected group regular group: injected group: TIM9_CC2 TIM9_CC1...

  • Page 54: Table 28. Dac Differences Between Stm32L1 Series And Stm32L4 Series

    Peripheral migration AN4612 4.20 The STM32L4 Series implement some enhanced DAC compared to STM32L1 Series. The table below shows the differences. Table 28. DAC differences between STM32L1 Series and STM32L4 Series STM32L1 Series STM32L4 Series Instances Resolution 12-bit Left or right data alignment in 12-bit mode...

  • Page 55: Table 29. Comp Differences Between Stm32L1 Series And Stm32L4 Series

    AN4612 Peripheral migration 4.21 COMP The table below presents the differences between the COMP interface of STM32L1 Series and STM32L4 Series: Table 29. COMP differences between STM32L1 Series and STM32L4 Series COMP STM32L1 Series STM32L4 Series COMP1 fixed threshold Type...

  • Page 56: Table 30. Opamp Differences Between Stm32L1 Series And Stm32L4 Series

    Peripheral migration AN4612 4.22 OPAMP The STM32L4 Series implement some enhanced OPAMPs compared to STM32L1 Series. The table below shows the differences. Table 30. OPAMP differences between STM32L1 Series and STM32L4 Series OPAMP STM32L1 Series STM32L4 Series x2 (Cat. 2 devices) Instances x1 (Cat.

  • Page 57: Table 31. Document Revision History

    16-Jul-2015 Initial release. Section 4.2: Memory mapping updated: Stop 0 mode added for content preservation. 23-Nov-2015 Table 15: PWR differences between STM32L1 Series and STM32L4 Series updated: Stop 0 mode added. Section 1: STM32L4 Series overview: added category 2 04-Mar-2016 and 4 for STLM32L4.
  • Page 58 ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.

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