Table 102. Dac Pins; Dac Channel Enable - ST STM32L4x6 Reference Manual

RM0351
Name
V
REF+
V
DDA
V
SSA
DAC_OUTx
17.3.2

DAC channel enable

Each DAC channel can be powered on by setting its corresponding ENx bit in the DAC_CR
register. The DAC channel is then enabled after a startup time t
Note: The ENx bit enables the analog DAC Channelx only. The DAC Channelx digital interface is
enabled even if the ENx bit is reset.
17.3.3 DAC data format
Depending on the selected configuration mode, the data have to be written into the specified
register as described below:
•
Single DAC channelx, there are three possibilities:
–
–
–
Depending on the loaded DAC_DHRyyyx register, the data written by the user is shifted and
stored into the corresponding DHRx (data holding registerx, which are internal non-memory-
mapped registers). The DHRx register is then loaded into the DORx register either
automatically, by software trigger or by an external event trigger.
Signal type
Input, analog reference
positive
Input, analog supply
Input, analog supply ground
Analog output signal
8-bit right alignment: the software has to load data into the DAC_DHR8Rx [7:0]
bits (stored into the DHRx[11:4] bits)
12-bit left alignment: the software has to load data into the DAC_DHR12Lx [15:4]
bits (stored into the DHRx[11:0] bits)
12-bit right alignment: the software has to load data into the DAC_DHR12Rx [11:0]
bits (stored into the DHRx[11:0] bits)
DocID024597 Rev 3
Digital-to-analog converter (DAC)

Table 102. DAC pins

The higher/positive reference voltage for the DAC,
≤
V V
DDAmin REF+
Analog power supply
Ground for analog power supply
DAC channelx analog output
Remarks
≤
V (refer to datasheet)
DDA
.
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