Table 154. Output Control Bit For Standard Ocx Channels; Timx Counter (Timx_Cnt) - ST STM32L4x6 Reference Manual

General-purpose timers (TIM2/TIM3/TIM4/TIM5)
Bit 2 Reserved, must be kept at reset value.
Bit 1 CC1P: Capture/Compare 1 output Polarity.
CC1 channel configured as output:
CC1 channel configured as input: CC1NP/CC1P bits select TI1FP1 and TI2FP1 polarity for
trigger or capture operations.
Bit 0 CC1E: Capture/Compare 1 output enable.
CC1 channel configured as output:
CC1 channel configured as input: This bit determines if a capture of the counter value can
actually be done into the input capture/compare register 1 (TIMx_CCR1) or not.
CCxE bit
0
1
Note: The state of the external IO pins connected to the standard OCx channels depends on the
OCx channel state and the GPIO and AFIO registers.
27.4.10

TIMx counter (TIMx_CNT)

Address offset: 0x24
Reset value: 0x0000
31 30 29
CNT[31]
or
UIFCPY
rw or r rw rw
15 14 13
rw rw rw
920/1693
0: OC1 active high
1: OC1 active low
00: noninverted/rising edge
Circuit is sensitive to TIxFP1 rising edge (capture, trigger in reset, external clock or trigger
mode), TIxFP1 is not inverted (trigger in gated mode, encoder mode).
01: inverted/falling edge
Circuit is sensitive to TIxFP1 falling edge (capture, trigger in reset, external clock or trigger
mode), TIxFP1 is inverted (trigger in gated mode, encoder mode).
10: reserved, do not use this configuration.
11: noninverted/both edges
Circuit is sensitive to both TIxFP1 rising and falling edges (capture, trigger in reset, external
clock or trigger mode), TIxFP1 is not inverted (trigger in gated mode). This configuration
must not be used for encoder mode.
0: Off - OC1 is not active
1: On - OC1 signal is output on the corresponding output pin
0: Capture disabled
1: Capture enabled

Table 154. Output control bit for standard OCx channels

OCx output state
Output Disabled (OCx=0, OCx_EN=0)
OCx=OCxREF + Polarity, OCx_EN=1
28 27 26 25
rw rw rw rw
12 11 10 9
rw rw rw rw
24 23 22
CNT[30:16] (depending on timers)
rw rw rw
8 7 6
CNT[15:0]
rw rw rw
DocID024597 Rev 3
21 20 19 18
rw rw rw rw
5 4 3 2
rw rw rw rw
RM0351
17 16
rw rw
1 0
rw rw