Embedded Flash memory (FLASH)
3.4
FLASH option bytes
3.4.1
Option bytes description
The option bytes are configured by the end user depending on the application requirements.
As a configuration example, the watchdog may be selected in hardware or software mode
(refer to
A double word is split up as follows in the option bytes:
63-24
23-16
Complemented
Complemented
option byte 3
option byte 2
The organization of these bytes inside the information block is as shown in
byte
organization.
The option bytes can be read from the memory locations listed in
organization
•
Flash option register (FLASH_OPTR)
•
Flash Bank 1 PCROP Start address register (FLASH_PCROP1SR)
•
Flash Bank 1 PCROP End address register (FLASH_PCROP1ER)
•
Flash Bank 1 WRP area A address register (FLASH_WRP1AR)
•
Flash Bank 1 WRP area B address register (FLASH_WRP1BR)
•
Flash Bank 2 PCROP Start address register (FLASH_PCROP2SR)
•
Flash Bank 2 PCROP End address register (FLASH_PCROP2ER)
•
Flash Bank 2 WRP area A address register (FLASH_WRP2AR)
•
Flash Bank 2 WRP area B address register
BANK
Address
63
1FFF7800
1FFF7808
1FFF7810
Bank 1
1FFF7818
1FFF7820
92/1693
Section 3.4.2: Option bytes
Table 9. Option byte format
15 -8
Complemented
option byte 1
or from the Option byte registers:
Table 10. Option byte organization
[62:56]
[55:48]
USER OPT
Unused
Unused
WRP1A
Unused
_END
WRP1B
Unused
_END
programming).
7-0
31-24
Complemented
Option
option byte 0
byte 3
(FLASH_WRP2BR).
[47:40]
[39:32]
31
RDP
PCROP1_STRT
PCROP1_END
WRP1A
Unused
_STRT
WRP1B
Unused
_STRT
DocID024597 Rev 3
23-16
15 -8
Option
Option
byte 2
byte 1
Table 10: Option
Table 10: Option byte
[30:24]
[23:16]
USER OPT
Unused
Unused
WRP1A
Unused
_
Unused
END
WRP1B
Unused
_
Unused
END
RM0351
7-0
Option
byte 0
[15:8]
[7:0]
RDP
PCROP1_STRT
PCROP1_END
WRP1A
_STRT
WRP1B
_STRT
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