Table 31. Rcc Register Map And Reset Values - ST STM32L4x6 Reference Manual

Reset and clock control (RCC)
6.4.31 RCC register map
The following table gives the RCC register map and the reset values.
Off-
Register
set
RCC_CR
0x00
Reset value
RCC_ICSCR
0x04
Reset value
RCC_CFGR
0x08
Reset value
RCC_PLL
CFGR
0x0C
Reset value
RCC_
PLLSAI1
0x10
CFGR
Reset value
RCC_
PLLSAI2
0x14
CFGR
Reset value
RCC_CIER
0x18
Reset value
RCC_CIFR
0x1C
Reset value
RCC_CICR
0x20
Reset value
250/1693

Table 31. RCC register map and reset values

0 0 0 0 0 0
HSITRIM[4:0]
1 0 0 0 0 x
MCOPRE MCOSEL
[2:0] [2:0]
0 0 0 0 0 0
PLLR
[1:0]
0 0 0
PLL
SAI1R SAI1Q
[1:0]
0 0 0
PLL
SAI2R
[1:0]
0 0 0
DocID024597 Rev 3
0 0 0 0
HSICAL[7:0]
x x x x x x x 0
0
PLLQ
[1:0]
0 0 0 0 0
PLL
[1:0]
0 0 0 0 0
0 0
MSIRANGE
[3:0]
0 0 0 0 0 1
MSITRIM[7:0]
0 0 0 0 0 0 0 x x
PPRE2 PPRE1
HPRE[3:0]
[2:0] [2:0]
0 0 0 0 0 0 0 0
PLLN
[6:0]
0 0 1 0 0 0 0 0
PLLSAI1N
[6:0]
0 0 1 0 0 0 0
PLLSAI2N
[6:0]
0 0 1 0 0 0 0
0 0 0
0 0 0 0
0 0 0 0
RM0351
1 0 0 0 1 1
MSICAL[7:0]
x x x x x x
SWS SW
[1:0] [1:0]
0 0 0 0 0 0
PLL
PLLM
SRC
[2:0]
[1:0]
0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0