Table 92. Analog Watchdog Channel Selection; Figure 98. Analog Watchdog's Guarded Area; Analog Window Watchdog (Awd1En, Jawd1En, Awd1Sgl Awd1Ch, Awd2Ch, Awd3Ch, Awd_Htx, Awd_Ltx, Awdx) - ST STM32L4x6 Reference Manual

Analog-to-digital converters (ADC)
16.3.28 Analog window watchdog (AWD1EN, JAWD1EN, AWD1SGL,
AWD1CH, AWD2CH, AWD3CH, AWD_HTx, AWD_LTx, AWDx)
The three AWD analog watchdogs monitor whether some channels remain within a
configured voltage range (window).
AWDx flag and interrupt
An interrupt can be enabled for each of the 3 analog watchdogs by setting AWDxIE in the
ADCx_IER register (x=1,2,3).
AWDx (x=1,2,3) flag is cleared by software by writing 1 to it.
The ADC conversion result is compared to the lower and higher thresholds before
alignment.
Description of analog watchdog 1
The AWD analog watchdog 1 is enabled by setting the AWD1EN bit in the ADCx_CFGR
register. This watchdog monitors whether either one selected channel or all enabled
channels
Table 92
watchdog on one or more channels.
Channels guarded by the analog
None
All injected channels
All regular channels
All regular and injected channels
(1)
Single
(1)
Single
(1)
Single
1. Selected by the AWD1CH[4:0] bits. The channels must also be programmed to be converted in the
appropriate regular or injected sequence.
The AWD1 analog watchdog status bit is set if the analog voltage converted by the ADC is
below a lower threshold or above a higher threshold.
474/1693

Figure 98. Analog watchdog's guarded area

(1)
remain within a configured voltage range (window).
shows how the ADCx_CFGR registers should be configured to enable the analog

Table 92. Analog watchdog channel selection

watchdog
injected channel
regular channel
regular or injected channel
DocID024597 Rev 3
AWD1SGL bit AWD1EN bit
x
0
0
0
1
1
1
RM0351
JAWD1EN bit
0 0
0 1
1 0
1 1
0 1
1 0
1 1