Adc Offset Register (Adcx_Ofry) (Y=1..4) - ST STM32L4x6 Reference Manual

RM0351
16.5.17

ADC offset register (ADCx_OFRy) (y=1..4)

Address offset: 0x60, 0x64, 0x68, 0x6C
Reset value: 0x0000 0000
31 30 29 28
OFFSETy
OFFSETy_CH[4:0]
_EN
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15 14 13 12
Res. Res. Res. Res.
Bit 31 OFFSETy_EN: Offset y Enable
Note: Software is allowed to write this bit only when ADSTART=0 and JADSTART=0 (which
Bits 30:26 OFFSETy_CH[4:0]: Channel selection for the Data offset y
Note: Software is allowed to write these bits only when ADSTART=0 and JADSTART=0
Bits 25:12 Reserved, must be kept at reset value.
Bits 11:0 OFFSETy[11:0]: Data offset y for the channel programmed into bits OFFSETy_CH[4:0]
Note: Software is allowed to write these bits only when ADSTART=0 and JADSTART=0
27 26 25
Res.
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11 10 9
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This bit is written by software to enable or disable the offset programmed into bits
OFFSETy[11:0].
ensures that no conversion is ongoing).
These bits are written by software to define the channel to which the offset programmed into
bits OFFSETy[11:0] will apply.
(which ensures that no conversion is ongoing).
These bits are written by software to define the offset y to be subtracted from the raw
converted data when converting a channel (can be regular or injected). The channel to which
applies the data offset y must be programmed in the bits OFFSETy_CH[4:0]. The conversion
result can be read from in the ADCx_DR (regular conversion) or from in the ADCx_JDRyi
registers (injected conversion).
(which ensures that no conversion is ongoing).
If several offset (OFFSETy) point to the same channel, only the offset with the lowest x
value is considered for the subtraction.
Ex: if OFFSET1_CH[4:0]=4 and OFFSET2_CH[4:0]=4, this is OFFSET1[11:0] which is
subtracted when converting channel 4.
24 23 22
Res. Res. Res.
8 7 6
OFFSETy[11:0]
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DocID024597 Rev 3
Analog-to-digital converters (ADC)
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
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17 16
Res. Res.
1 0
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