ST STM32L4x6 Reference Manual page 249

RM0351
Bit 25 OBLRSTF: Option byte loader reset flag
Bit 24 FWRSTF: Firewall reset flag
Bit 23 RMVF: Remove reset flag
Bits 22:12 Reserved, must be kept at reset value.
Bits 11:8 MSISRANGE[3:1] MSI range after Standby mode
Note:
Bits 7:2 Reserved, must be kept at reset value.
Bit 1 LSIRDY: LSI oscillator ready
Bit 0 LSION: LSI oscillator enable
Set by hardware when a reset from the Option Byte loading occurs.
Cleared by writing to the RMVF bit.
0: No reset from Option Byte loading occurred
1: Reset from Option Byte loading occurred
Set by hardware when a reset from the firewall occurs.
Cleared by writing to the RMVF bit.
0: No reset from the firewall occurred
1: Reset from the firewall occurred
Set by software to clear the reset flags.
0: No effect
1: Clear the reset flags
Set by software to chose the MSI frequency at startup. This range is used after exiting
Standby mode until MSIRGSEL is set. After a pad or a power-on reset, the range is always
4 MHz. MSISRANGE can be written only when MSIRGSEL = '1'.
0100: Range 4 around 1 MHz
0101: Range 5 around 2 MHz
0101: Range 6 around 4 MHz (reset value)
0111: Range 7 around 8 MHz
others: reserved
Changing the MSISRANGE does not change the current MSI frequency.
Set and cleared by hardware to indicate when the LSI oscillator is stable. After the LSION bit
is cleared, LSIRDY goes low after 3 LSI oscillator clock cycles. This bit can be set even if
LSION = 0 if the LSI is requested by the Clock Security System on LSE, by the Independent
Watchdog or by the RTC.
0: LSI oscillator not ready
1: LSI oscillator ready
Set and cleared by software.
0: LSI oscillator OFF
1: LSI oscillator ON
DocID024597 Rev 3
Reset and clock control (RCC)
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