ST STM32L4x6 Reference Manual page 322

Nested vectored interrupt controller (NVIC)
Type of
priority
46 53 settable
47 54 settable
48 55 settable
49 56 settable
50 57 settable
51 58 settable
52 59 settable
53 60 settable
54 61 settable
55 62 settable
56 63 settable
57 64 settable
58 65 settable
59 66 settable
60 67 settable
61 68 settable
62 69 settable
63 70 settable
64 71 settable
65 72 settable
66 73 settable
67 74 settable
68 75 settable
69 76 settable
70 77 settable
71 78 settable
72 79 settable
73 79 settable
74 80 settable
75 74 settable
76 75 settable
322/1693
Table 42. STM32L4x6 vector table (continued)
Acronym
TIM1_CC TIM8 capture compare interrupt
ADC3 ADC3 global interrupt
FMC FMC global interrupt
SDMMC1 SDMMC1 global interrupt
TIM5 TIM5 global interrupt
SPI3 SPI3 global interrupt
UART4 UART4 global interrupt
UART5 UART5 global interrupt
TIM6_DACUNDER TIM6 global and DAC12 underrun interrupts
TIM7 TIM7 global interrupt
DMA2_CH1 DMA2 channel 1 interrupt
DMA2_CH2 DMA2 channel 2 interrupt
DMA2_CH3 DMA2 channel 3 interrupt
DMA2_CH4 DMA2 channel 4 interrupt
DMA2_CH5 DMA2 channel 5 interrupt
DFSDM0 DFSDM0 global interrupt
DFSDM1 DFSDM1 global interrupt
DFSDM2 DFSDM2 global interrupt
COMP1/COMP2 through EXTI lines 21/22
COMP
interrupts
LPTIM1 LPTIM1 global interrupt
LPTIM2 LPTIM2 global interrupt
OTG_FS OTG_FS global interrupt
DMA2_CH6 DMA2 channel 6 interrupt
DMA2_CH7 DMA2 channel 7 interrupt
LPUART1 LPUART1 global interrupt
QUADSPI QUADSPI global interrupt
I2C3_EV I2C3 event interrupt
I2C3_ER I2C3 error interrupt
SAI1 SAI1 global interrupt
SAI2 SAI2 global interrupt
SWPMI1 SWPMI1 global interrupt
DocID024597 Rev 3
Description
RM0351
Address
0x0000 00F8
0x0000 00FC
0x0000 0100
0x0000 0104
0x0000 0108
0x0000 010C
0x0000 0110
0x0000 0114
0x0000 0118
0x0000 011C
0x0000 0120
0x0000 0124
0x0000 0128
0x0000 012C
0x0000 0130
0x0000 0134
0x0000 0138
0x0000 013C
0x0000 0140
0x0000 0144
0x0000 0148
0x0000 014C
0x0000 0150
0x0000 0154
0x0000 0158
0x0000 015C
0x0000 0160
0x0000 0164
0x0000 0168
0x0000 016C
0x0000 0170