ST STM32L4x6 Reference Manual page 210

Reset and clock control (RCC)
Bit 16 PLLSAI2PEN: SAI2PLL PLLSAI2CLK output enable
Bit 15 Reserved, must be kept at reset value.
Bits 14:8 PLLSAI2N[6:0]: SAI2PLL multiplication factor for VCO
Caution:
Bits 7:0 Reserved, must be kept at reset value.
210/1693
Set and reset by software to enable the PLLSAI2CLK output of the SAI2PLL.
In order to save power, when the PLLSAI2CLK output of the SAI2PLL is not used, the value
of PLLSAI2PEN should be 0.
0: PLLSAI2CLK output disable
1: PLLSAI2CLK output enable
Set and cleared by software to control the multiplication factor of the VCO. These bits can be
written only when the SAI2PLL is disabled.
VCOSAI2 output frequency = VCOSAI2 input frequency x PLLSAI2N
with 8 =< PLLSAI2N =< 86
0000000: PLLSAI2N = 0 wrong configuration
0000001: PLLSAI2N = 1 wrong configuration
...
0000111: PLLSAI2N = 7 wrong configuration
0001000: PLLSAI2N = 8
0001001: PLLSAI2N = 9
...
1010101: PLLSAI2N = 85
1010110: PLLSAI2N = 86
1010111: PLLSAI2N = 87 wrong configuration
...
1111111: PLLSAI2N = 127 wrong configuration
The software has to set correctly these bits to ensure that the VCO output
frequency is between 64 and 344 MHz.
DocID024597 Rev 3
RM0351