Quadspi Delayed Data Sampling - ST STM32L4x6 Reference Manual

Quad-SPI interface (QUADSPI)
15.3.8

QUADSPI delayed data sampling

By default, the QUADSPI samples the data driven by the Flash memory one half of a CLK
cycle after the Flash memory drives the signal.
In case of external signal delays, it may be beneficial to sample the data later. Using the
SSHIFT bit (QUADSPI_CR[4]), the sampling of the data can be shifted by half of a CLK
cycle.
Clock shifting is not supported in DDR mode: the SSHIFT bit must be clear when DDRM bit
is set.
15.3.9 QUADSPI configuration
The QUADSPI configuration is done in two phases:
•
QUADSPI IP configuration
•
QUADSPI Flash memory configuration
Once configured and enabled, the QUADSPI can be used in one of its three operating
modes: indirect mode, status-polling mode, or memory-mapped mode.
QUADSPI IP configuration
The QUADSPI IP is configured using the QUADSPI_CR. The user shall configure the clock
prescaler division factor and the sample shifting settings for the incoming data.
DDR mode can be set through the DDRM bit. Once enabled, the address and the alternate
bytes are sent on both clock edges and the data are sent/received on both clock edges.
Regardless of the DDRM bit setting, instructions are always sent in SDR mode.
The DMA requests are enabled setting the DMAEN bit. In case of interrupt usage, their
respective enable bit can be also set during this phase.
FIFO level for either DMA request generation or interrupt generation is programmed in the
FTHRES bits.
If timeout counter is needed, the TCEN bit can be set and the timeout value programmed in
the QUADSPI_LPTR register.
QUADSPI Flash memory configuration
The parameters related to the targeted external Flash memory are configured through the
QUADSPI_DCR register.The user shall program the Flash memory size in the FSIZE bits,
the Chip Select minimum high time in the CSHT bits, and the functional mode (Mode 0 or
Mode 3) in the MODE bit.
15.3.10 QUADSPI usage
The operating mode is selected using FMODE[1:0] (QUADSPI_CCR[27:26]).
Indirect mode procedure
When FMODE is programmed to 00, indirect write mode is selected and data can be sent to
the Flash memory. With FMODE = 01, indirect read mode is selected where data can be
read from the Flash memory.
When the QUADSPI is used in indirect mode, the frames are constructed in the following
way:
408/1693 DocID024597 Rev 3
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