Table 72. Fmc_Bcrx Bit Fields; Figure 47. Synchronous Multiplexed Read Mode Waveforms - Nor, Psram (Cram) - ST STM32L4x6 Reference Manual

Flexible static memory controller (FSMC)

Figure 47. Synchronous multiplexed read mode waveforms - NOR, PSRAM (CRAM)

1. Byte lane outputs (NBL are not shown; for NOR access, they are held high, and, for PSRAM (CRAM)
access, they are held low.
Bit number
31-21
20
19
18:16
15
14
13
12
11
10
9
374/1693

Table 72. FMC_BCRx bit fields

Bit name
Reserved 0x000
CCLKEN As needed
CBURSTRW No effect on synchronous read
CPSIZE 0x0 (no effect in asynchronous mode)
ASYNCWAIT 0x0
EXTMOD 0x0
To be set to 1 if the memory supports this feature, to be kept at 0
WAITEN
otherwise
WREN No effect on synchronous read
WAITCFG To be set according to memory
Reserved 0x0
WAITPOL To be set according to memory
DocID024597 Rev 3
Value to set
RM0351