Figure 308. Update Rate Examples Depending On Mode And Timx_Rcr Register Settings; Clock Selection - ST STM32L4x6 Reference Manual

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Figure 308. Update rate examples depending on mode and TIMx_RCR register
28.4.4

Clock selection

The counter clock can be provided by the following clock sources:
• Internal clock (CK_INT)
•
External clock mode1: external input pin
• Internal trigger inputs (ITRx) (only for TIM15): using one timer as the prescaler for
another timer, for example, you can configure TIM1 to act as a prescaler for TIM15.
Refer to
Internal clock source (CK_INT)
If the slave mode controller is disabled (SMS=000), then the CEN (in the TIMx_CR1
register) and UG bits (in the TIMx_EGR register) are actual control bits and can be changed
Using one timer as prescaler for another timer on page 896
DocID024597 Rev 3
General-purpose timers (TIM15/16/17)
settings
for more details.
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