ST STM32L4x6 Reference Manual page 1009

RM0351
Table 160. TIM16&TIM17 register map and reset values (continued)
Offset Register
TIMx_PSC
0x28
Reset value
TIMx_ARR
0x2C
Reset value
TIMx_RCR
0x30
Reset value
TIMx_CCR1
0x34
Reset value
TIMx_BDTR
0x44
Reset value
TIMx_DCR
0x48
Reset value
TIMx_DMAR
0x4C
Reset value
TIM16_OR1
0x50
Reset value
TIM16_OR2
0x60
Reset value
TIM17_OR1
0x50
Reset value
TIM17_OR2
0x60
Reset value
Refer to
boundary addresses.
Section 2.2.2: Memory map and register boundary addresses
General-purpose timers (TIM15/16/17)
0
1
0
0
0
DocID024597 Rev 3
PSC[15:0]
0 0 0 0 0 0 0 0 0
ARR[15:0]
1 1 1 1 1 1 1 1 1
0 0
CCR1[15:0]
0 0 0 0 0 0 0 0 0
LOC
K
[1:0]
0 0 0 0 0 0 0 0 0
DBL[4:0]
0 0 0 0 0
DMAB[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0
0 0 0 0
for the register
0 0 0 0 0 0
1 1 1 1 1 1
REP[7:0]
0 0 0 0 0 0
0 0 0 0 0 0
DT[7:0]
0 0 0 0 0 0
DBA[4:0]
0 0 0 0 0
0 0 0 0 0 0
TI1_
RMP
[1:0]
0 0
0 0 1
TI1_
RMP
[1:0]
0 0
0 0 1
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