Table 126. Dfsdm Register Map And Reset Values - ST STM32L4x6 Reference Manual

Digital filter for sigma delta modulators (DFSDM)
21.8 DFSDM register map
The following table summarizes the DFSDM registers.
Offset Register
DFSDM_
CHCFG0R1
0x00
reset value 0
DFSDM_
CHCFG0R2
0x04
reset value
DFSDM_
AWSCD0R
0x08
reset value
DFSDM_
CHWDAT0R
0x0C
reset value
DFSDM_
CHDATIN0R
0x10
reset value 0
0x14 -
Reserved
0x1C
DFSDM_
CHCFG1R1
0x20
reset value
DFSDM_
CHCFG1R2
0x24
reset value 0
DFSDM_
AWSCD1R
0x28
reset value
DFSDM_
CHWDAT1R
0x2C
reset value
DFSDM_
CHDATIN1R
0x30
reset value 0
0x34 -
Reserved
0x3C
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Table 126. DFSDM register map and reset values

0 0 0
0 0
INDAT1[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0
INDAT1[15:0]
0 0 0 0 0 0 0 0 0
DocID024597 Rev 3
CKOUTDIV[7:0]
0 0 0 0 0 0 0 0
OFFSET[23:0]
0
AWFOSR[4:0] BKSCD[3:0]
0 0 0 0 0 0 0
0 0
0 0 0 0 0 0 0 0
0 0
OFFSET[23:0]
0 0 0 0 0 0 0 0
AWFOSR[4:0] BKSCD[3:0]
0 0 0 0 0 0 0
0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0
DTRBS[4:0]
0
0 0 0 0 0
WDATA[15:0]
0 0 0 0 0 0 0 0 0
INDAT0[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
DTRBS[4:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0
WDATA[15:0]
0 0 0 0 0 0 0 0 0
INDAT0[15:0]
0 0 0 0 0 0 0 0 0
RM0351
0 0 0 0
SCDT[7:0]
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0
0 0
SCDT[7:0]
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0