Adc Sample Time Register 1 (Adcx_Smpr1) - ST STM32L4x6 Reference Manual

RM0351
Bits 4:2 OVSR[2:0]: Oversampling ratio
This bitfield is set and cleared by software to define the oversampling ratio.
000: 2x
001: 4x
010: 8x
011: 16x
100: 32x
101: 64x
110: 128x
111: 256x
Note: Software is allowed to write these bits only when ADSTART=0 (which ensures that no
conversion is ongoing).
Bit 1 JOVSE: Injected Oversampling Enable
This bit is set and cleared by software to enable injected oversampling.
0: Injected Oversampling disabled
1: Injected Oversampling enabled
Note: Software is allowed to write this bit only when ADSTART=0 and JADSTART=0 (which ensures
that no conversion is ongoing)
Bit 0 ROVSE: Regular Oversampling Enable
This bit is set and cleared by software to enable regular oversampling.
0: Regular Oversampling disabled
1: Regular Oversampling enabled
Note: Software is allowed to write this bit only when ADSTART=0 and JADSTART=0 (which ensures
that no conversion is ongoing)
16.5.6

ADC sample time register 1 (ADCx_SMPR1)

Address offset: 0x14
Reset value: 0x0000 0000
31 30 29 28
Res. Res. SMP9[2:0]
rw rw
15 14 13 12
SMP
SMP4[2:0]
5_0
rw rw rw rw
27 26 25 24
SMP8[2:0]
rw rw rw rw
11 10 9 8
SMP3[2:0]
rw rw rw rw
DocID024597 Rev 3
Analog-to-digital converters (ADC)
23 22 21
SMP7[2:0]
rw rw rw
7 6 5
SMP2[2:0] SMP1[2:0]
rw rw rw
20 19 18 17
SMP6[2:0] SMP5[2:1]
rw rw rw rw
4 3 2 1
SMP0[2:0]
rw rw rw rw
16
rw
0
rw
515/1693
540