Table 158. Tim15 Register Map And Reset Values - ST STM32L4x6 Reference Manual

General-purpose timers (TIM15/16/17)
Bit 0 BKINE: BRK BKIN input enable
This bit enables the BKIN alternate function input for the timer's BRK input. BKIN input is
'ORed' with the other BRK sources.
0: BKIN input disabled
1: BKIN input enabled
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
28.5.20 TIM15 register map
TIM15 registers are mapped as 16-bit addressable registers as described in the table
below:
Offset Register
TIM15_CR1
0x00
Reset value
TIM15_CR2
0x04
Reset value
TIM15_SMCR
0x08
Reset value
TIM15_DIER
0x0C
Reset value
TIM15_SR
0x10
Reset value
TIM15_EGR
0x14
Reset value
TIM15_CCMR1
Output
Compare mode
Reset value
0x18
TIM15_CCMR1
Input Capture
mode
Reset value
986/1693
in TIMx_BDTR register).

Table 158. TIM15 register map and reset values

0
DocID024597 Rev 3
CKD
[1:0]
0 0
0 0
0
0 0 0 0
0 0
OC2M CC2S
[2:0] [1:0]
0 0 0 0 0 0 0
IC2
CC2S
IC2F[3:0] PSC
[1:0]
[1:0]
0 0 0 0 0 0 0
RM0351
0 0 0 0 0
MMS[2:0]
0 0 0 0 0 0 0
TS[2:0] SMS[2:0]
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
OC1M CC1S
[2:0] [1:0]
0 0 0 0 0 0 0
IC1
CC1S
IC1F[3:0] PSC
[1:0]
[1:0]
0 0 0 0 0 0 0 0
0
0
0
0
0
0
0
0