Adc Regular Sequence Register 1 (Adcx_Sqr1) - ST STM32L4x6 Reference Manual

Analog-to-digital converters (ADC)
16.5.11

ADC regular sequence register 1 (ADCx_SQR1)

Address offset: 0x30
Reset value: 0x0000 0000
31 30 29
Res. Res. Res.
15 14 13
SQ2[3:0]
rw rw rw
Bits 31:29 Reserved, must be kept at reset value.
Bits 28:24 SQ4[4:0]: 4th conversion in regular sequence
Note: Software is allowed to write these bits only when ADSTART=0 (which ensures that no
Bit 23 Reserved, must be kept at reset value.
Bits 22:18 SQ3[4:0]: 3rd conversion in regular sequence
Note: Software is allowed to write these bits only when ADSTART=0 (which ensures that no
Bit 17 Reserved, must be kept at reset value.
Bits 16:12 SQ2[4:0]: 2nd conversion in regular sequence
Note: Software is allowed to write these bits only when ADSTART=0 (which ensures that no
Bit 11 Reserved, must be kept at reset value.
Bits 10:6 SQ1[4:0]: 1st conversion in regular sequence
Note: Software is allowed to write these bits only when ADSTART=0 (which ensures that no
Bits 5:4 Reserved, must be kept at reset value.
Bits 3:0 L[3:0]: Regular channel sequence length
Note: Software is allowed to write these bits only when ADSTART=0 (which ensures that no
520/1693
28 27 26 25
SQ4[4:0]
rw rw rw rw
12 11 10 9
Res.
rw rw rw
These bits are written by software with the channel number (0..18) assigned as the 4th in the
regular conversion sequence.
regular conversion is ongoing).
These bits are written by software with the channel number (0..18) assigned as the 3rd in the
regular conversion sequence.
regular conversion is ongoing).
These bits are written by software with the channel number (0..18) assigned as the 2nd in
the regular conversion sequence.
regular conversion is ongoing).
These bits are written by software with the channel number (0..18) assigned as the 1st in the
regular conversion sequence.
regular conversion is ongoing).
These bits are written by software to define the total number of conversions in the regular
channel conversion sequence.
0000: 1 conversion
0001: 2 conversions
...
1111: 16 conversions
regular conversion is ongoing).
24 23 22
Res.
rw rw
8 7 6
SQ1[4:0]
rw rw rw
DocID024597 Rev 3
21 20 19 18
SQ3[4:0]
rw rw rw rw
5 4 3 2
Res. Res.
rw rw
RM0351
17 16
Res. SQ2[4]
rw
1 0
L[3:0]
rw rw