The Baud Rate Generator Clock; The Synchronization Clocks - Motorola MPC823e Reference Manual

Microprocessor for mobile computing
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Clocks and Power Control
The baud rate generator clock frequency is:
VCOOUT freq
BRGCLK freq
=
------------------------------------------ -
×
2 DFBRG
(
)
2
5.3.4.3 THE SYNCHRONIZATION CLOCKS. The synchronization clock signal
(SYNCCLK) is used by the serial synchronization circuitry in the serial ports of the
communication processor module that includes the serial interface, serial communication
controllers, and serial management controllers. SYNCCLK defaults to VCOOUT, which is
the user-defined system frequency (25-75MHz).
VCOOUT
DFSYNC
SYNCCLK allows the serial interface, serial communication controllers, and serial
management controllers to continue operating at a fixed frequency, even when the rest of
the MPC823e is operating at a reduced frequency. This allows you to maintain the serial
synchronization circuitry at the preferred rate, while lowering the general system clock to the
lowest possible rate. SYNCCLK must always have a frequency at least as high as the
general system clock frequency and be at least two times the preferred serial clock rate. If
the time-slot assigner in the serial interface is used, SYNCCLK is at least two and half times
the preferred serial clock rate. Refer to Section 16.7 The Serial Interface with Time-Slot
Assigner for more information on how to select an appropriate frequency for SYNCCLK.
The synchronization clock frequency is:
VCOOUT freq
SYNCCLK freq
=
---------------------------------------------- -
×
2 DFSYNC
(
2
5-20
SYNCCLK
Figure 5-12. SYNCCLK Divider
)
MPC823e REFERENCE MANUAL
CPM
MOTOROLA

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