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Timer Destination Registers
Offset
Bit
3
3
2
2
1
0
9
8
Name
Operation
R
Reset
$00
This register indicates the destinations for this timer's interrupts. Timer
interrupts operate in the directed delivery interrupt mode. This register
may specify multiple destinations (multicast delivery).
P1
P0
External Source Vector/Priority Registers
Offset
Bit
3
3
2
2
1
0
9
8
Name
Operation
Reset
$000
http://www.motorola.com/computer/literature
Timer 0 - $01130
Timer 1 - $01170
Timer 2 - $011B0
Timer 3 - $011F0
2
2
2
2
2
2
2
2
1
7
6
5
4
3
2
1
0
9
TIMER DESTINATION
R
$00
PROCESSOR 1. The interrupt is directed to processor 1.
PROCESSOR 0. The interrupt is directed to processor 0.
Int Src 0 - $10000
Int Src 2 -> Int Src15 - $10020 -> $101E0
2
2
2
2
2
2
2
2
1
7
6
5
4
3
2
1
0
9
EXTERNAL SOURCE VECTOR/PRIORITY
PRIOR
R
R/W
Raven Interrupt Controller Implementation
1
1
1
1
1
1
1
1
1
8
7
6
5
4
3
2
1
0 9 8 7 6 5 4 3 2 1 0
R
$00
1
1
1
1
1
1
1
1
1
8
7
6
5
4
3
2
1
0 9 8 7 6 5 4 3 2 1 0
R
$0
$00
2
R
$00
VECTOR
R/W
$00
2-79
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