Gptm Timer B Mode (Gptmtbmr) Register, Offset 0X008; Gptm Timer B Mode (Gptmtbmr) Register; Gptm Timer B Mode (Gptmtbmr) Register Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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2.6.3 GPTM Timer B Mode (GPTMTBMR) Register, offset 0x008

The GPTM Timer B Mode (GPTMTBMR) register configures the GPTM based on the configuration
selected in the GPTMCFG register. When in PWM mode, set the TBAMS bit, clear the TBCMR bit, and
configure the TBMR field to 0x2.
This register controls the modes for Timer B when it is used individually. When Timer A and Timer B are
concatenated, this register is ignored and GPTMTBMR controls the modes for both Timer A and Timer B.
Important: Bits in this register should only be changed when the TBEN bit in the GPTMCTL register is
cleared.
31
15
7 6
TBSNAPS TBWOT
R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 2-7. GPTM Timer B Mode (GPTMTBMR) Register Field Descriptions
Bit Field
31-8 Reserved
7 TBSNAPS
6 TBWOT
5 TBMIE
4 TBCDIR
3 TBAMS
2 TBCMR
SPRUH22I – April 2012 – Revised November 2019
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Figure 2-8. GPTM Timer B Mode (GPTMTBMR) Register
5 4
TBMIE TBCDIR
R/W-0 R/W-0
Value Description
Reserved
GPTM Timer B Snap-Shot Mode
0 Snap-shot mode is disabled.
1 If Timer B is configured in the periodic mode, the actual free-running value of Timer B is loaded at
the time-out event into the GPTM Timer B (GPTMTBR) register.
GPTM Timer B Wait-on-Trigger
0 Timer B begins counting as soon as it is enabled.
1 If Timer B is enabled (TBEN is set in the GPTMCTL register), Timer B does not begin counting until
it receives an it receives a trigger from the timer in the previous position in the daisy chain, see
Figure 2-2. This function is valid for both one-shot and periodic modes.
GPTM Timer B Match Interrupt Enable
0 The match interrupt is disabled.
1 An interrupt is generated when the match value in the GPTMTBMATCHR register is reached in the
one-shot and periodic modes.
GPTM Timer B Count Direction
0 The timer counts down.
1 When in one-shot or periodic mode, the timer counts up. When counting up, the timer starts from a
value of 0x0.
GPTM Timer B Alternate Mode Select
0 Capture mode is enabled.
1 PWM mode is enabled.
Note: To enable PWM mode, you must also clear the TBCMR bit and configure the TBMR field to
0x1 or 0x2.
GPTM Timer B Capture Mode
0 Edge-Count mode
1 Edge-Time mode
Copyright © 2012–2019, Texas Instruments Incorporated
Reserved
R-0
Reserved
R-0
3 2
TBAMS TBCMR
R/W-0 R/W-0
Register Descriptions
8
1 0
TBMR
R/W-0
M3 General-Purpose Timers
16
311