Error Interrupt Flag Clear Register (Err_Intclr); Data High Test Register (Fdatah_Test); Data Low Test Register (Fdatal_Test); Error Interrupt Flag Clear Register (Err_Intclr) Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

Flash Registers

5.4.2.10 Error Interrupt Flag Clear Register (ERR_INTCLR)

31
15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-105. Error Interrupt Flag Clear Register (ERR_INTCLR) Field Descriptions
Bit Field
31-2 Reserved
1 UNC_ERR_INT_CLR
0 SINGLE_ERR_INT_CLR

5.4.2.11 Data High Test Register (FDATAH_TEST)

31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-106. Data High Test Register (FDATAH_TEST) Field Descriptions
Bit Field
31-0 FDATAH

5.4.2.12 Data Low Test Register (FDATAL_TEST)

31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-107. Data Low Test Register (FDATAL_TEST) Field Descriptions
Bit Field
31-0 FDATAL
522
Internal Memory
Figure 5-101. Error Interrupt Flag Clear Register (ERR_INTCLR)
Reserved
R-0
Value Description
Reserved
Uncorrectable bit error interrupt flag clear. Writing a 1 to this bit will clear
UNC_ERR_INT_FLG. Writes of 0 have no effect.
Single bit error interrupt flag clear. Writing a 1 to this bit will clear
SINGLE_ERR_INT_FLG. Writes of 0 have no effect.
Figure 5-102. Data High Test Register (FDATAH_TEST)
Value Description
High double word of selected 64-bit data. User-configurable bits 63:32 of the selected data blocks
in ECC test mode.
Figure 5-103. Data Low Test Register (FDATAL_TEST)
Value Description
Low double word of selected 64-bit data. User-configurable bits 31:0 of the selected data blocks in
ECC test mode.
Copyright © 2012–2019, Texas Instruments Incorporated
Reserved
R-0
FDATAH
R/W-0
FDATAL
R/W-0
SPRUH22I – April 2012 – Revised November 2019
www.ti.com
2 1 0
UNC_ERR_ SINGLE_ERR_
INT_CLR INT_CLR
R/W0-1 R/W0-1
Submit Documentation Feedback
16
0
0