Gptm Timer A Value (Gptmtav) Register, Offset 0X050; Gptm Timer B Value (Gptmtbv) Register, Offset 0X054; Gptm Timer B (Gptmtbr) Register; Gptm Timer A Value (Gptmtav) Register - Texas Instruments Concerto F28M35 Series Technical Reference Manual

Register Descriptions
31
Reserved
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 2-22. GPTM Timer B (GPTMTBR) Register Field Descriptions
Bit Field Value
31-16 Reserved
15-0 TBR 0xFFFF.F

2.6.19 GPTM Timer A Value (GPTMTAV) Register, offset 0x050

When read, the GPTM Timer A Value (GPTMTAV) register shows the current, free-running value of Timer
A in all modes. Software can use this value to determine the time elapsed between an interrupt and the
ISR entry. When written, the value written into this register is loaded into the GPTMTAR register on the
next clock cycle. In Input Edge-Count mode, bits 23:16 contain the upper 8 bits of the count.
When a GPTM is configured to one of the 32-bit modes, GPTMTAV appears as a 32-bit register (the
upper 16-bits correspond to the contents of the GPTM Timer B Value (GPTMTBV) register). In a 16-bit
mode, bits 15:0 contain the value of the counter and bits 23:16 contain the current, free-running value of
the prescaler, which is the upper 8 bits of the count. Bits 31:24 always read as 0.
NOTE: The GPTMTAV register cannot be written in edge-count mode.
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 2-23. GPTM Timer A Value (GPTMTAV) Register Field Descriptions
Bit Field
31-0 TAV 0xFFFF

2.6.20 GPTM Timer B Value (GPTMTBV) Register, offset 0x054

When read, the GPTM Timer B Value (GPTMTBV) register shows the current, free-running value of Timer
B in all modes. Software can use this value to determine the time elapsed between an interrupt and the
ISR entry. When written, the value written into this register is loaded into the GPTMTBR register on the
next clock cycle. In Input Edge-Count mode, bits 23:16 contain the upper 8 bits of the count.
When a GPTM is configured to one of the 32-bit modes, the contents of bits 15:0 in this register are
loaded into the upper 16 bits of the GPTMTAV register. Reads from this register return the current free-
running value of Timer B. In a 16-bit mode, bits 15:0 contain the current, free-running value of the counter
and bits 23:16 contain the current, free-running value of the prescaler, which is the upper 8 bits of the
count. Bits 31:24 are reserved in both cases.
322
M3 General-Purpose Timers
Figure 2-23. GPTM Timer B (GPTMTBR) Register
16 15
Description
Reserved
GPTM TimerB Register
FFF
A read returns the current value of the GPTM Timer B Count Register, in all cases except for Input
Edge Count and Time modes. In the Input Edge Count mode, this register contains the number of
edges that have occurred. In the Input Edge Time mode, this register contains the time at which the
last edge event took place.
Figure 2-24. GPTM Timer A Value (GPTMTAV) Register
Value Description
GPTM Timer A Value
.FFFF
A read returns the current, free-running value of Timer A in all modes. When written, the value
written into this register is loaded into the GPTMTAR register on the next clock cycle.
Copyright © 2012–2019, Texas Instruments Incorporated
TAV
R/W-1
SPRUH22I – April 2012 – Revised November 2019
www.ti.com
TBR
R-1
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