System Control Registers
1.13.13.8 MTOCIPCADDR Register
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit
Field
31-0
ADDR
1.13.13.9 MTOCIPCDATAW Register
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit
Field
31-0
WDATA
1.13.13.10 MTOCIPCDATAR Register
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit
Field
31-0
RDATA
1.13.13.11 CTOMIPCBOOTSTS Register
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
296
System Control and Interrupts
Figure 1-179. MTOCIPCADDR Register
Table 1-191. MTOCIPCADDR Register Field Descriptions
Value
Description
0
M3 TO C28 IPC Address Register. This register used as an address holder for IPC commands from
the M3 to the C28 CPU. It is read/write to the M3 CPU and read only to the C28 CPU.
Figure 1-180. MTOCIPCDATAW Register
Table 1-192. MTOCIPCDATAW Register Field Descriptions
Value
Description
0
M3 TO C28 IPC Data Write Register. This register is used as a write data holder for IPC commands
from the M3 to the C28 CPU. It is read/write to the M3 CPU and read only to the C28 CPU.
Figure 1-181. MTOCIPCDATAR Register
Table 1-193. MTOCIPCDATAR Register Field Descriptions
Value
Description
0
M3 TO C28 IPC Data Read Register. This register is an IPC read data hold register for the M3 to
the C28 CPU IPC. It is read/write to the C28 CPU and read only to the M3 CPU.
Figure 1-182. CTOMIPCBOOTSTS Register
Copyright © 2012–2019, Texas Instruments Incorporated
ADDR
R/W-0
WDATA
R/W-0
RDATA
R-0
BOOTSTS
R/W-0
SPRUH22I – April 2012 – Revised November 2019
www.ti.com
0
0
0
0
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