Gpio Port E Set, Clear And Toggle (Gpeset, Gpeclear, Gpetoggle) Registers; Gpio Port E Set (Gpeset) Register Field Descriptions; Gpio Port E Clear (Gpeclear) Register Field Descriptions; Gpio Port E Toggle (Gpetoggle) Register Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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4.2.7.33 GPIO Port E Set, Clear and Toggle (GPESET, GPECLEAR, GPETOGGLE) Registers

The GPIO Port E Set, Clear and Toggle (GPESET, GPECLEAR, GPETOGGLE) registers are shown and

described in the figure and table below.

Figure 4-74. GPIO Port E Set, Clear and Toggle (GPESET, GPECLEAR, GPETOGGLE) Registers

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 4-88. GPIO Port E Set (GPESET) Register Field Descriptions

GPIO135 -GPIO128

Table 4-89. GPIO Port E Clear (GPECLEAR) Register Field Descriptions

GPIO135 -GPIO128

Table 4-90. GPIO Port E Toggle (GPETOGGLE) Register Field Descriptions

GPIO135 -GPIO128

SPRUH22I – April 2012 – Revised November 2019

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Any writes to these bit(s) must always have a value of 0.

Each GPIO port E pin (GPIO128-GPIO135) corresponds to one bit in this register.

Writes of 0 are ignored. This register always reads back a 0.

Writing a 1 forces the respective output data latch to high. If the pin is configured as a GPIO

output then it will be driven high. If the pin is not configured as a GPIO output then the latch is

set but the pin is not driven.

Any writes to these bit(s) must always have a value of 0.

Each GPIO port E pin (GPIO128-GPIO135) corresponds to one bit in this register.

Writes of 0 are ignored. This register always reads back a 0.

Writing a 1 forces the respective output data latch to low. If the pin is configured as a GPIO

output then it will be driven low. If the pin is not configured as a GPIO output then the latch is

cleared but the pin is not driven.

Any writes to these bit(s) must always have a value of 0.

Each GPIO port E pin (GPIO128-GPIO135) corresponds to one bit in this register.

Writes of 0 are ignored. This register always reads back a 0.

Writing a 1 forces the respective output data latch to toggle from its current state. If the pin is

configured as a GPIO output then it will be driven in the opposite direction of its current state. If

the pin is not configured as a GPIO output then the latch is cleared but the pin is not driven.

C28 General-Purpose Input/Output (GPIO)

General-Purpose Input/Output (GPIO)

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