Flash Bank Access Control Register (Fbac); Flash Bank Fallback Power Register (Fbfallback); Flash Bank Access Control Register (Fbac) Field Descriptions; Flash Bank Fallback Power Register (Fbfallback) Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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Flash Registers

Flash Bank Access Control Register (FBAC)

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 5-116. Flash Bank Access Control Register (FBAC) Field Descriptions

Figure 5-113. Flash Bank Fallback Power Register (FBFALLBACK)

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 5-117. Flash Bank Fallback Power Register (FBFALLBACK) Field Descriptions

Internal Memory

Figure 5-112. Flash Bank Access Control Register (FBAC)

Bank Active Grace Period. These bits contain the starting count value for the BAGP down counter.

Any access to a given bank causes its BAGP counter to reload the BAGP value for that bank. After

the last access to this flash bank, the down counter delays from 0 to 255 prescaled C28x SYSCLK

clock cycles before putting the bank into one of the fallback power modes as determined by the

FBFALLBACK register. This value must be greater than 1 when the fallback mode is not ACTIVE.

Note: The prescaled clock used for the BAGP down counter is a clock divided by 16 from input

C28x SYSCLK.

VREAD setup. VREAD is generated by the flash pump and used for flash read operation. The bank

power up sequencing starts VREADST HCLK cycles after VREAD power supply becomes stable.

Fall back power mode.

Sleep (Sense amplifiers and sense reference disabled)

Standby (Sense amplifiers disabled, but sense reference enabled)

Active (Both sense amplifiers and sense reference enabled)

Note: If the bank and pump are not in active mode and an access is made, the value of this

SPRUH22I – April 2012 – Revised November 2019

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