Non-Master Cpu Write Access Violation Address Register (Cnmwravaddr); Non-Master Dma Write Access Violation Address Register (Cnmdmawravaddr); Non-Master Cpu Fetch Access Violation Address Register (Cnmfavaddr); Non-Master Cpu Write Access Violation Address Register (Cnmwravaddr) Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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5.2.4.20 Non-Master CPU Write Access Violation Address Register (CNMWRAVADDR)

Figure 5-72. Non-Master CPU Write Access Violation Address Register (CNMWRAVADDR)
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-77. Non-Master CPU Write Access Violation Address Register (CNMWRAVADDR) Field
Bit Field
31-0 NMCPUWRAVADDR

5.2.4.21 Non-Master DMA Write Access Violation Address Register (CNMDMAWRAVADDR)

Figure 5-73. Non-Master DMA Write Access Violation Address Register (CNMDMAWRAVADDR)
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-78. Non-Master DMA Write Access Violation Address Register (CNMDMAWRAVADDR) Field
Bit Field
31-0 NMDMAWRAVADDR

5.2.4.22 Non-Master CPU Fetch Access Violation Address Register (CNMFAVADDR)

Figure 5-74. Non-Master CPU Fetch Access Violation Address Register (CNMFAVADDR)
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-79. Non-Master CPU Fetch Access Violation Address Register (CNMFAVADDR) Field
Bit Field
31-0 NMCPUFAVADDR
SPRUH22I – April 2012 – Revised November 2019
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NMCPUWRAVADDR
R-0
Descriptions
Value Description
Non-Master CPU Write Access Violation Address
This holds the address at which C28x CPU attempted a write access and the non-master
CPU write access violation occurred.
NMDMAWRAVADDR
R-0
Descriptions
Value Description
Non-Master DMA Write Access Violation Address
This holds the address at which C28x DMA attempted a write access and the non-master
DMA write access violation occurred.
NMCPUFAVADDR
R-0
Descriptions
Value Description
Non-Master CPU Fetch Access Violation Address
This holds the address at which C28x CPU attempted a code fetch and the non-master
CPU fetch access violation occurred.
Copyright © 2012–2019, Texas Instruments Incorporated
RAM Control Module Registers
Internal Memory
0
0
0
491