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During the device initialization process, M-Boot ROM reads the MRESC register and if the reset cause is
POR, then all of the master subsystem RAMs are zero-initialized and for all the other reset causes, only
M-Boot ROM stack memory is zero-initialized.
6.5.5 M-Boot ROM RAM Usage
M-Boot ROM uses part of C2 RAM, which is unsecured memory for stack, data and to log boot status.
The first 0x900 bytes from start of C2 RAM start address (0x20004000) is reserved for boot ROM.
Applications are free to reuse this memory after boot ROM execution is completed. However, that this part
of C2 RAM will be zero-initialized by M-Boot ROM if it is rerun because of a reset which occurs while the
application is running. In other words, if an application is using the first 0x900 bytes of C2 RAM, then it
cannot expect the contents to be preserved between resets. This is extremely important for a debugger
reset and software reset.
6.5.5.1
M-Boot ROM Stack
The C2 memory range 0x20004584 to 0x20004900 is allocated for the M-Boot ROM stack.
6.5.5.2
M-Boot ROM Data Section
The M-Boot ROM data section is located in C2 memory from address 0x20004004 to 0x20004583.
6.5.5.3
M-Boot ROM Boot Status
The first location in C2 RAM is reserved by M-Boot ROM boot status. This location is used for boot ROM
to log status of different events that occur in the system during boot and applications can use this status to
take necessary actions.
This location is preserved during master subsystem SW and debugger resets unlike the boot ROM data
and stack memory range which is zero-initialized for these resets.
User applications can reuse this memory location after it reads the device boot status or it can leave this
location reserved if there is a need to preserve boot status between resets.
Note that M-Boot ROM itself doesn't use this boot status for any purpose this is only provided to let
applications know about it.
More details on the boot status is given in
6.5.6 M-Boot ROM User OTP
The boot ROM user configurable DCSM OTP field descriptions and memory addresses are detailed in
Table 6-4
and
Table
information..
Address
0x680800
0x680804
0x680808
0x68080C
Address
0x680800
0x680804
0x680808
0x68080C
SPRUH22I – April 2012 – Revised November 2019
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Section
6-5. Each field is provided with a description of its purpose and associated ECC
Table 6-4. REV0 – User Configurable DCSM OTP Fields
Description
OTP Security LOCK
EMAC MAC ID 0
EMAC MAC ID 1
Reserved
Table 6-5. REVA – User Configurable DCSM OTP Fields
Description
OTP Security LOCK
Reserved
Reserved
Z2 FLASH ENTRY POINT
Copyright © 2012–2019, Texas Instruments Incorporated
6.5.12.
ECC is shared for these fields, so they must be
programmed at the same time.
ECC is shared for these fields, so they must be
programmed at the same time.
ECC is shared for these fields, so they must be
programmed at the same time.
ECC is shared for these fields, so they must be
programmed at the same time.
ROM Code and Peripheral Booting
M-Boot ROM Description
Notes
Notes
543
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