Gpio Trip Input Select Register (Gptripxsel); Gpio Trip Input Select Register (Gptripxsel) Field Descriptions; Gptrip Input Signals - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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4.2.7.35 GPIO Trip Input Select (GPTRIPxSEL) Register
The GPIO Trip Input Select (GPTRIPxSEL) register is shown and described in the figure and table below.
15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-94. GPIO Trip Input Select Register (GPTRIPxSEL) Field Descriptions
Bits
Field
15-6
Reserved
5-0
GPTRIPxSEL
(1)
This register is EALLOW protected.
Note: There are 12 GPTRIP select registers and each has a specific input signal associated with it.
Table 4-95
shows the input signal mapping.
Register
GPTRIP1SEL
GPTRIP2SEL
GPTRIP3SEL
GPTRIP4SEL
GPTRIP5SEL
GPTRIP6SEL
GPTRIP7SEL
GPTRIP8SEL
GPTRIP9SEL
GPTRIP10SEL
GPTRIP11SEL
GPTRIP12SEL
4.2.7.36 GPIO Low Power Mode Wakeup Select 1 (GPIOLPMSEL1) Register
The GPIO Low Power Mode Wakeup Select 1 (GPIOLPMSEL1) register is shown and described in the
figure and table below.
SPRUH22I – April 2012 – Revised November 2019
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Figure 4-76. GPIO Trip Input Select Register (GPTRIPxSEL)
Reserved
R-0
Value
Reserved
Select GPIO input for GPTRIP signal: .
000000
Select the GPIO0
000001
Select the GPIO1
. . .
. . .
111110
Select the GPIO62
111111
Select the GPIO63
Table 4-95. GPTRIP Input Signals
Copyright © 2012–2019, Texas Instruments Incorporated
C28 General-Purpose Input/Output (GPIO)
6
5
(1)
Description

GPTRIP Input Signals

TZ1n and TRIPIN1
TZ2n, ADCEXTTRIG, and TRIPIN2
TZ3n and TRIPIN3
XINT1 and TRIPIN4
XINT2 and TRIPIN5
XINT3 and TRIPIN6
ECAP1 and TRIPIN7
ECAP2 and TRIPIN8
ECAP3 and TRIPIN9
ECAP4 and TRIPIN10
ECAP5 and TRIPIN11
ECAP6 and TRIPIN12
General-Purpose Input/Output (GPIO)
0
GPTRIPxSEL
R/W-0
423

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