M3 Uncorrectable Error Flag Register (Mueflg); M3 Uncorrectable Error Flag Register (Mueflg) Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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5.2.2.7

M3 Uncorrectable Error Flag Register (MUEFLG)

31
15
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-27. M3 Uncorrectable Error Flag Register (MUEFLG) Field Descriptions
Bit Field
31-4 Reserved
3 UDMARE
2 M3CPURE
1 UDMAWE
0 M3CPUWE
SPRUH22I – April 2012 – Revised November 2019
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Figure 5-22. M3 Uncorrectable Error Flag Register (MUEFLG)
R-0
Value Description
Reserved
M3 µDMA Uncorrectable Read Error Status Flag .
0 No M3 µDMA uncorrectable read error occurred.
1 M3 µDMA uncorrectable read error occurred.
Once this bit is set, it can be cleared by setting the corresponding error clear bit in the MUECLR
register.
M3 CPU Uncorrectable Read Error Status Flag.
0 No M3 CPU uncorrectable read error occurred.
1 M3 CPU uncorrectable read error occurred.
Once this bit is set, it can be cleared by setting the corresponding error clear bit in the MUECLR
register.
M3 µDMA Uncorrectable Write Error Status Flag.
0 No M3 µDMA uncorrectable write error occurred.
1 M3 µDMA uncorrectable write error occurred.
Once this bit is set, it can be cleared by setting the corresponding error clear bit in the MUECLR
register.
M3 CPU Uncorrectable Write Error Status Flag.
0 No M3 CPU uncorrectable write error occurred.
1 M3 CPU uncorrectable write error occurred.
Once this bit is set, it can be cleared by setting the corresponding error clear bit in the MUECLR
register.
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Reserved
R-0
4 3 2
UDMARE M3CPURE
R-0 R-0
RAM Control Module Registers
16
1 0
UDMAWE M3CPUWE
R-0 R-0
Internal Memory
455